Support instructions that clobber all registers and have non-fixed uses
There are currently special cases for when an instruction uses a fixed register and clobbers it, but when an instruction uses an unconstrained register and clobbers all registers there is no special case and we get a TooManyLiveRegisters error. This can be avoided by adding an unnecessary fixed register constraint so that the first special case is hit, but one shouldn't have to constrain the register allocation in that way, regalloc2 should just handle this case.
My comment in #146 should probably have gone here; I think there's a way to do this more generally, by doing splits in a more general way (in the middle of insts) and leveraging overlap support.
The interesting thing with this issue is that it isn't limited to a single RegClass. If an instruction clobbers/Defs all registers in the Vector class, but has some Uses in the Integer class that are non-fixed, the error TooManyLiveRegisters is still raised. This is really unintuitive because the classes (in my mind) should be entirely disjoint and the constraints on one should not affect another. I confess I'm not familiar enough with the code base to try and tackle this yet though.
Additionally, under similar circumstances I was able to reach the panic here https://github.com/bytecodealliance/regalloc2/blob/main/src/ion/process.rs#L1266