Sangwan Kwon

Add multiple registers and update fields

1

I added the following registers by referring [here](https://developer.arm.com/documentation/ddi0601/2024-03/AArch64-Registers?lang=en). ## Added registers - CNTPOFF_EL2 - CPTR_EL2 - HPFAR_EL2 - ICC_CTLR_EL1 - ICC_SRE_EL2 - ICH_AP0R_EL2 - ICH_AP1R_EL2 - ICH_HCR_EL2 - ICH_LR_EL2 -...

This PR presents a quick draft for safely creating an instance at a given memory address. As discussed in https://github.com/islet-project/islet/pull/342, utilizing the idea proposed by @L0czek, this approach involves parsing...

Currently, the analysis fails due to a conflict between the dependencies of the crates used by `cargo-geiger` (syn, serde-json) and the dependencies of the `ciborium` crate used in the attestation...

Cover all RMIs with MIRI testing

3

This PR aims to introduce MIRI testing across all RMI functions to strengthen memory safety within RMM, particularly by addressing potential issues arising from `unsafe code`. To cover all 23...

MIRI Integration Status

3

## MIRI found bugs ### 1. Memory Leak in Multi-Level Page Table - Problem: Sub Tables allocated during the `map()` in RMM's Page Table were not deallocated during the `unmap()`...

The ACS Test hangs depending on the amount of logging. This issue occurs only in the multi-core test case (cmd_multithread_realm_mp). ## Steps to Reproduce: 1. Use the current main code...

## 1. Problem Background Currently, in our RMM, we manage core objects such as the **RMM's Page Table**, **Granule Status Table**, and **RTTs** as static variables. This approach was chosen...