[InnerShuffle] elastic memory (elasticmem) module for improved timing closure

[STFleming]

This PR enhances the InnerShuffle RTL implementation for improved timing closure by leveraging fused output register inference into BRAM/URAM.

The enhancement is realized by adding a new utility module, elasticmem, which incorporates additional pipeline register stages around the memory unit. Read requests and read data outputs are managed via a streaming interface with a ready/valid handshake, ensuring efficient handling of backpressure even when requests are in flight through the output register pipelines.