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Dataflow compiler for QNN inference on FPGAs

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Small modifications to fix a bug sometimes occurring when using the auto FIFO sizing and VitisBuild. Due to the renaming of nodes and the conservation of cached IP folders, it...

## Prerequisites Please make sure to check off these prerequisites before submitting a bug report. - [x] Test that the bug appears on the current version of the dev-branch. Make...

bug

Hello, everyone! It may not be a real issue, but I would like to call attention to this anyways. Currently, the performance report is generated with a single call to...

bug

Dependencies: https://github.com/Xilinx/finn-hlslib/pull/109 This PR introduces a new `HLSCustomOp` called `StreamingEltwise`, which corresponds to the proposed finn-hlslib component with the same name. This layer is intended to generalize parameter-less, elementwise operations...

Hi, after creating Onnx files with neural network from Brevitas I tried to transform it on ZynqBoard following to tfc_end2end_example.ipynb chapter 3. Hardware Build. Unfortunately this line: model = model.transform(ZynqBuild......

bug

Hi, I am using FINN to generate some kernels but I have some problems when I launch the bitfile with the XRT driver on my Alveo U50. Previously, I installed...

bug

Hello, I have trained my model as QNN with brevitas. Basically my input shape is: > torch.Size([1, 3, 1024]) I have exported the .pt extended file. As I try my...

bug

Update QONNX commit hash to get the latest changes: * https://github.com/fastmachinelearning/qonnx/pull/21 * https://github.com/fastmachinelearning/qonnx/pull/20 * https://github.com/fastmachinelearning/qonnx/pull/19 * https://github.com/fastmachinelearning/qonnx/pull/18 * https://github.com/fastmachinelearning/qonnx/pull/17