Need to handle MIPS64 relocations properly
What is the feature you'd like to have?
Currently, in MIPS64, we don't handle MIPS64-specific relocations properly. They appear to be non-standard and are built out of three separate relocations (see the comment and structs here in the gdb source). If I'm understanding this right, a relocation of 4611 should be something like (R_MIPS_64 << 8) | R_MIPS_REL32 | 3 = 4611
Is your feature request related to a problem?
Binaries like this libc from a router that uses a Cavium OCTEON processor (libc-2.9.so.zip) report multiple relocations that are not recognized. It's unclear to me at this point how impactful these are on analysis, but the fact that we don't handle any of the MIPS64 relocations is likely problematic in at least some limited scenarios.