Unaligned transfers and Endian option for Axi write slave

[basedVecna]

It seems that the AXI lite write slave does not support unaligned transfers (If an address in unaligned it is clipped down to the lower boundary), the slave memory also only uses little endianness, independent of the endianess set in the memory_t. Should this be implemented or is it a purposeful decision?

[crdavis12]

I've also just run into the issue of unaligned transfers not working in the axi_read_slave. Haven't gotten there yet but I suspect axi_write_slave will be similar. Is there any more discussion on this that I may be missing? I am making some updates to these as I work through my design.