OpenROAD icon indicating copy to clipboard operation
OpenROAD copied to clipboard

Fanout violations during global routing

Open vijayank88 opened this issue 3 years ago • 15 comments

@tspyrou As I tried APU design with GF180 PDK, during global routing seeing rise in fanout count causing timing violations of WNS with -234ns.

Attached DEF and groute.tcl

Log snippet: Complete log available in attachment. gftest1_groute_packaged.zip

Startpoint: _7272_ (rising edge-triggered flip-flop clocked by clk)
Endpoint: Sample[9] (output port clocked by clk)
Path Group: clk
Path Type: max

Fanout     Cap    Slew   Delay    Time   Description
-----------------------------------------------------------------------------

                  1.87    1.63   19.86 ^ _4788_/ZN (OAI21_X1_7T5P0)
     2    0.01                           _1461_ (net)
                  1.87    0.00   19.86 ^ _4789_/A3 (XOR3_X1_7T5P0)
                349.42  224.19  244.05 ^ _4789_/Z (XOR3_X1_7T5P0)
  2511    3.08                           _1462_ (net)
                349.42    0.21  244.26 ^ _4790_/I (CLKBUF_X1_7T5P0)
                  4.68   -3.95  240.31 ^ _4790_/Z (CLKBUF_X1_7T5P0)
     1    0.01                           net71 (net)
                  4.68    0.00  240.31 ^ output71/I (CLKBUF_X4_7T5P0)
                  1.18    2.39  242.70 ^ output71/Z (CLKBUF_X4_7T5P0)
     1    0.07                           Sample[9] (net)
                  1.18    0.00  242.71 ^ Sample[9] (out)
                                242.71   data arrival time

                         10.00   10.00   clock clk (rise edge)
                          0.00   10.00   clock network delay (propagated)
                         -0.25    9.75   clock uncertainty
                          0.00    9.75   clock reconvergence pessimism
                         -2.00    7.75   output external delay
                                  7.75   data required time
-----------------------------------------------------------------------------
                                  7.75   data required time
                               -242.71   data arrival time
-----------------------------------------------------------------------------
                               -234.96   slack (VIOLATED)

vijayank88 avatar Jun 09 '22 17:06 vijayank88

@jjcherry56 can you look at this one?

tspyrou avatar Jun 09 '22 17:06 tspyrou

Please package a complete testcase with all of the data to run it. The only thing in this tarfile is a def file and a command file and references to undefined variables.

jjcherry56 avatar Jun 09 '22 19:06 jjcherry56

@jjcherry56 Its private PDK. I am not sure what are the files to attach here. I will send as Email. Thanks.

vijayank88 avatar Jun 10 '22 03:06 vijayank88

It is fine to reference the PDK in or1:/platforms etc but I have to be able to run it in openroad (not shell, not openlane) with all of the design files and variables.

jjcherry56 avatar Jun 10 '22 16:06 jjcherry56

There is no GF180.git repo in either of the 2 places I know to find it: or1:/platforms and /home/zf4_projects/OpenROAD-guest/platforms. So where is it hiding?

jjcherry56 avatar Jun 11 '22 00:06 jjcherry56

@vijayank88 have you sent a pointer to the gf180 data?

maliberty avatar Jun 13 '22 17:06 maliberty

@tspyrou pointed me to the pdk. I had to make some changes to the run script to make it work, but got it to run.

jjcherry56 avatar Jun 14 '22 01:06 jjcherry56

The groute.tcl script seg faults while trying to do antenna repair in everybody's favorite opendb wire code. There is some chance those "fanouts" were diodes that were inserted during antenna repair that managed to complete because the memory corruption on your run didn't cause a seg fault. Use the following command to look at the connections on the net: report_net -connections -verbose 1462

report_net

jjcherry56 avatar Jun 14 '22 02:06 jjcherry56

It is indeed an antenna repair that is the culprit. Compiling with optimization on disables an assertion check that causes it to fail.

jjcherry56 avatar Jun 14 '22 02:06 jjcherry56

There are a number of bugs that this testcase exposes but your biggest problem appears to be a density so high that antenna repair has no place to put diodes so it is unable to fix the problem and keeps trying over and over. Try reducing the density earlier in the flow so it isn't packed so tight.

jjcherry56 avatar Jun 14 '22 20:06 jjcherry56

The GF180 LEF metal layers have constant values for ANTENNADIFFSIDEAREARATIO. This means that adding diffusion with diodes does not repair the antenna violations because the allowed ratio of metal to gate area or side area does not change as it would with a PWL model. I have a pending PR that detects this situation and reports it instead of adding tons of pointless diodes.

jjcherry56 avatar Jun 21 '22 02:06 jjcherry56

@jjcherry56 sorry for responding late. My access to GF180 restored recently. Complete OpenLane flow got setup and ran APU design again with versionC. The test case I shared with you is versionA PDK lib. With latest lib i am not facing fanout violations.

There are slew violations, its related ANTEANNA. Post routing sta report:

===========================================================================
 report_tns
============================================================================
tns -5274.90
tns_report_end
wns_report

===========================================================================
 report_wns
============================================================================
wns -42.00
wns_report_end
worst_slack

===========================================================================
 report_worst_slack -max (Setup)
============================================================================
worst slack -42.00

===========================================================================
 report_worst_slack -min (Hold)
============================================================================
worst slack 0.35
worst_slack_end
clock_skew

===========================================================================

vijayank88 avatar Jun 23 '22 05:06 vijayank88

aes and aes_core design has fanout issue again with gf180.

aes_core post routing sta report follows.

Startpoint: reset_n (input port clocked by clk)
Endpoint: _41039_ (recovery check against rising-edge clock clk)
Path Group: **async_default**
Path Type: max

Fanout     Cap    Slew   Delay    Time   Description
-----------------------------------------------------------------------------
                          0.00    0.00   clock clk (rise edge)
                          0.00    0.00   clock network delay (propagated)
                          4.40    4.40 ^ input external delay
                  2.63    1.51    5.91 ^ reset_n (in)
     2    0.04                           reset_n (net)
                  2.63    0.00    5.91 ^ input389/I (BUF_X20_7T5P0)
                 10.62    6.99   12.90 ^ input389/Z (BUF_X20_7T5P0)
   598    3.85                           net389 (net)
                 10.63    0.18   13.08 ^ repeater523/I (BUF_X20_7T5P0)
                 14.34    7.65   20.72 ^ repeater523/Z (BUF_X20_7T5P0)
   820    5.64                           net523 (net)
                 14.34    0.14   20.87 ^ repeater522/I (BUF_X20_7T5P0)
                 16.74    9.66   30.53 ^ repeater522/Z (BUF_X20_7T5P0)
   890    6.34                           net522 (net)
                 17.83    2.38   32.91 ^ repeater521/I (BUF_X20_7T5P0)
                 11.98    7.37   40.28 ^ repeater521/Z (BUF_X20_7T5P0)
   662    4.56                           net521 (net)
                 14.32    3.16   43.44 ^ _41039_/RN (DFFRNQ_X2_7T5P0)
                                 43.44   data arrival time

                         22.00   22.00   clock clk (rise edge)
                          0.00   22.00   clock source latency
                  3.73    2.10   24.10 ^ clk (in)
     2    0.26                           clk (net)
                  3.73    0.00   24.10 ^ clkbuf_0_clk/I (CLKBUF_X16_7T5P0)
                  0.80    1.66   25.75 ^ clkbuf_0_clk/Z (CLKBUF_X16_7T5P0)
     8    0.18                           clknet_0_clk (net)
                  0.80    0.01   25.76 ^ clkbuf_2_0_0_clk/I (CLKBUF_X8_7T5P0)
                  0.29    0.81   26.57 ^ clkbuf_2_0_0_clk/Z (CLKBUF_X8_7T5P0)
     1    0.02                           clknet_2_0_0_clk (net)
                  0.29    0.00   26.57 ^ clkbuf_2_0_1_clk/I (CLKBUF_X8_7T5P0)
                  0.29    0.65   27.21 ^ clkbuf_2_0_1_clk/Z (CLKBUF_X8_7T5P0)
     1    0.02                           clknet_2_0_1_clk (net)
                  0.29    0.00   27.22 ^ clkbuf_2_0_2_clk/I (CLKBUF_X8_7T5P0)
                  0.55    0.83   28.04 ^ clkbuf_2_0_2_clk/Z (CLKBUF_X8_7T5P0)
     4    0.06                           clknet_2_0_2_clk (net)
                  0.55    0.00   28.05 ^ clkbuf_3_1_0_clk/I (CLKBUF_X8_7T5P0)
                  0.27    0.71   28.76 ^ clkbuf_3_1_0_clk/Z (CLKBUF_X8_7T5P0)
     1    0.01                           clknet_3_1_0_clk (net)
                  0.27    0.00   28.76 ^ clkbuf_3_1_1_clk/I (CLKBUF_X8_7T5P0)
                  0.53    0.81   29.56 ^ clkbuf_3_1_1_clk/Z (CLKBUF_X8_7T5P0)
     4    0.05                           clknet_3_1_1_clk (net)
                  0.53    0.00   29.57 ^ clkbuf_4_2_0_clk/I (CLKBUF_X8_7T5P0)
                  0.66    0.97   30.53 ^ clkbuf_4_2_0_clk/Z (CLKBUF_X8_7T5P0)
     4    0.07                           clknet_4_2_0_clk (net)
                  0.66    0.00   30.54 ^ clkbuf_5_4_0_clk/I (CLKBUF_X8_7T5P0)
                  0.49    0.91   31.45 ^ clkbuf_5_4_0_clk/Z (CLKBUF_X8_7T5P0)
     4    0.05                           clknet_5_4_0_clk (net)
                  0.49    0.00   31.45 ^ clkbuf_6_9_0_clk/I (CLKBUF_X8_7T5P0)
                  2.77    2.17   33.62 ^ clkbuf_6_9_0_clk/Z (CLKBUF_X8_7T5P0)
    28    0.38                           clknet_6_9_0_clk (net)
                  2.77    0.02   33.64 ^ clkbuf_leaf_858_clk/I (CLKBUF_X16_7T5P0)
                  0.30    1.15   34.79 ^ clkbuf_leaf_858_clk/Z (CLKBUF_X16_7T5P0)
     2    0.01                           clknet_leaf_858_clk (net)
                  0.30    0.00   34.79 ^ _41039_/CLK (DFFRNQ_X2_7T5P0)
                         -0.25   34.54   clock uncertainty
                          0.00   34.54   clock reconvergence pessimism
                         -5.89   28.65   library recovery time
                                 28.65   data required time
-----------------------------------------------------------------------------
                                 28.65   data required time
                                -43.44   data arrival time
-----------------------------------------------------------------------------
                                -14.79   slack (VIOLATED)

vijayank88 avatar Jun 23 '22 11:06 vijayank88

Did you update the version of openroad you are using to include commit 062004eff that includes the change I described in a previous post? The testcase you originally submitted works as intended with the latest version of openroad when I run it.

Inserted antennas will always show up as "fanout" because they are connected to the net.

I can't tell if you have changed the pdk or not. If you are going change the design/testcase you must attach it to the issue or post it someplace to make it available.

jjcherry56 avatar Jun 23 '22 16:06 jjcherry56

@jjcherry56 Shared another test case to openroad.tools mail ID with test case for aes design for GF180 PDK. I'm seeing fanout violation, with latest commit again.

Please keep this issue open, until GF180 test completes. Thanks

vijayank88 avatar Jun 29 '22 13:06 vijayank88

As gf180 PDK become public and OpenLane/open-pdks update going on. Once PDK enabled with OpenLane, I'll test again with latest OpenROAD and open a new issue if I'm facing anything again. Thanks!!!

vijayank88 avatar Sep 07 '22 12:09 vijayank88