FEATURE REQUEST: Unite multiple wires of a n-bit connection to one wire (Bus System)

[SimonBuxx]

In some editors, it's possible to not show every individual wire going in and out of registers etc. but summing them to one wire that transfers multiple bits. This can be very hard, espically handling the connections with custom objects and gates. Not a managable problem right now, but maybe in the far future.

[SimonBuxx]

There could be a class similar to WSeg that handles n bits. There should also be n-bit in-/ and outputs for custom object export. Also, there should be converters that take one n-bit wire as an input and output n one-bit connectors.

To implement this, many parts of the code have to be adapted (load/save, etc.) and there must be a clear indication whether a wire is one- or n-bit. Also, in-/output pins have to indicate this, including how many bits they accept. Faulty connections, e.g. a 4-bit wire on a one-bit connector should be accepted. In this case, only the first bit would be transferred. If the pin accepts more bits than the wire delivers, the other bits should be zero.

[SimonBuxx]

Bus System Update

I am happy to announce that this feature is coming in the not-to-far future. Bus wires will be analogous to standard wires except they can handle multiple state bits. These bus wires are incompatible with normal wires and in/outputs but can be used for bus in/output transfer and be converted back to individual outputs.

So far, I have developed the bus system with basic functions (no un/redo, saving etc. at this point) and created two new elements to convert bus signals to individual signals and back. Also, there is a version of the 7-segment display providing a bus input (see pics). The required bit width for the busses is detected automatically.

Providing the possibility to create custom modules that include bus in-/or outputs could be harder... Configuration will happen in the "Modules" workspace, saved in the json files and accounted for in the custom module code.

Currently, these features are not in a committable state but I will commit as soon as basic functionality is stable enough.

Wire/Bus selector in the left bar:

Current development state (details may change):

[SimonBuxx]

Progress update for Bus development

• Bus lines itself are now feature-finished, meaning they can be used like normal wires with connection points and everything. Diodes are not supported on busses, joining busses is equivalent to performing logical bitwise OR on the state bits.
• Add, delete, undo and redo are implemented for bus lines and wrapper/unwrapper modules (wrappers have a delay time of one tick btw).
• 7-segment displays come in two options, with bus line input or normal inputs.
• Wrapper/Unwrapper module's single in/outputs can now be inverted
• I redesigned the Wire/Bus selector and assigned B as a shortcut (see pic).
• Selection features for bus lines and modules are pending.
• Saving and loading bus components is also pending.
• I'll work on custom modules with bus i/o as soon as the basic bus and converter components are ready.
• I'm not sure how to name the wrapper/unwrapper modules, options are e.g. WRAP/UNWRAP, Wrapper/Unwrapper, BUS IN/BUS OUT (feedback is welcome!)

Very pleased with the progress so far, I'm excited to test these features in actual builds!

[SimonBuxx]

First bus system commit is out!

Progress so far:

• Bus lines are functional
• Wrapper/Unwrapper modules are implemented and can be inverted by clicking the symbol
• Busses and Wrapper/Unwrapper modules can be saved and loaded
• Busses and Wrapper/Unwrapper modules can be selected, moved, copied and deleted. Moved busses will merge if overlapping just like normal wires.
• Bus crossings can be connected and disconnected by clicking on them
• Undo/redo is implemented for everything so far (Bus invert isn't undoable but saveable)
• Wrappers/Unwrappers will get updated pics soon
• 7-segment displays will get bus invert buttons soon

[SimonBuxx]

There are now new native decoder modules, that can be configured for bus I/O.