Simon Pilgrim comments

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                                            Simon Pilgrim

[X86][AVX] Recognise out of bounds AVX2 shift amounts

ISD::SRA handling landed at #84426 / 186565513c57cd625ea7afd7b33897adfed7e9f8

[X86][AVX] Recognise out of bounds AVX2 shift amounts

Logical shift left/right both need dealing with, but those will be combined from either VSELECT or AND nodes.

[X86][AVX] Recognise out of bounds AVX2 shift amounts

This was the kind of thing I had in mind: https://gcc.godbolt.org/z/rdh9j3ocW

[IR] Add nowrap flags for trunc instruction

@elhewaty I've started playing with some vector test coverage already - once this has landed I'll commit the tests, raise a ticket and assign it to you.

[X86] Truncate i64 sub to i32 when upper 33 bits are zeros

@omkar-mohanty reverse-ping

[X86] Truncate i64 sub to i32 when upper 33 bits are zeros

closing abandoned PR (it can be reopened if necessary)

[InstCombine] Fold Minimum over Trailing/Leading Bits Counts

> > Could we use value tracking and support non-constant values and non-uniform vectors? > > I don't think this transform is profitable for non-constant values. But I'd still like...

[VectorCombine] New folding pattern for extract/binop/shuffle chains

@Rajveer100 Please can you investigate the CI failures?

[VectorCombine] New folding pattern for extract/binop/shuffle chains

> @RKSimon Do you know where this pattern is generated from? If it is only introduced by SLP/LoopVec, can we just emit a reduction instead? Is this pattern left as...

[X86][GISEL] Enable Pre Legalizer Combiner

@arsenm Is the recommended approach still to have a separate X86O0PreLegalizerCombiner as well?