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mis2008 sensor lib
It seems values that calculated by sensor_mirror_flip are incorrect.
Details
static GK_VOID sensor_mirror_flip(VI_PIPE ViPipe, ISP_SNS_MIRRORFLIP_TYPE_E eSnsMirrorFlip)
{
ISP_SNS_STATE_S *pstSnsState = GK_NULL;
MIS2008_SENSOR_GET_CTX(ViPipe, pstSnsState);
CMOS_CHECK_POINTER_VOID(pstSnsState);
GK_U8 FRAME_H_ST, FRAME_H_END;
GK_U8 FRAME_W_ST, FRAME_W_END;
GK_U8 value = 0;
switch (eSnsMirrorFlip) {
case ISP_SNS_NORMAL:
value |= 0;
FRAME_H_ST = 4;
FRAME_H_END = 0x3f;
FRAME_W_ST = 8;
FRAME_W_END = 0x88;
break;
case ISP_SNS_MIRROR:
value |= 0x01;
FRAME_H_ST = 4;
FRAME_H_END = 0x3f;
FRAME_W_ST = 0xa;
FRAME_W_END = 0x89;
break;
case ISP_SNS_FLIP:
value |= 0x02;
FRAME_H_ST = 5;
FRAME_H_END = 0x40;
FRAME_W_ST = 8;
FRAME_W_END = 0x88;
break;
case ISP_SNS_MIRROR_FLIP:
value |= 0x03;
FRAME_H_ST = 5;
FRAME_H_END = 0x40;
FRAME_W_ST = 0xa;
FRAME_W_END = 0x89;
break;
default:
return;
}
mis2008_write_register(ViPipe, 0x3205, FRAME_H_ST);
mis2008_write_register(ViPipe, 0x3207, FRAME_H_END);
mis2008_write_register(ViPipe, 0x3209, FRAME_W_ST);
mis2008_write_register(ViPipe, 0x320b, FRAME_W_END);
mis2008_write_register(ViPipe, MIS2008_FLIP_MIRROR_ADDR, value);
}
translated from chinese
In Subsampling mode, the lower 2 bits of FRAMW_HST (address: {0x3204[2:0], 0x3205[7:0]}) and FRAMW_WST (address: {0x3208[2:0], 0x3209[7:0]}) need to be configured as 2’b00, and the lower 2 bits of FRAME_HEND (address: {0x3206[2:0], 0x3207[7:0]}) and FRAME_WEND (address: {0x320A[2:0], 0x320B[7:0]}) need to be configured as 2’b11.
without 2’b00 and 2’b11 i got image like this. may it is related only to my camera.
array size bug. dgain_table_size != 255 ( 15 * 16 )
Details
static GK_U32 Dgain_table[] = {
1024, 1088, 1152, 1216, 1280, 1344, 1408, 1472, 1536, 1600, 1664, 1728, 1792, 1856, 1920, 1984,
2048, 2112, 2176, 2240, 2304, 2368, 2432, 2496, 2560, 2624, 2688, 2752, 2816, 2880, 2944, 3008,
3072, 3136, 3200, 3264, 3328, 3392, 3456, 3520, 3584, 3648, 3712, 3776, 3840, 3904, 3968, 4032,
4096, 4160, 4224, 4288, 4352, 4416, 4480, 4544, 4608, 4672, 4736, 4800, 4864, 4928, 4992, 5056,
5120, 5184, 5248, 5312, 5376, 5440, 5504, 5568, 5632, 5696, 5760, 5824, 5888, 5952, 6016, 6080,
6144, 6208, 6272, 6336, 6400, 6464, 6528, 6592, 6656, 6720, 6784, 6848, 6912, 6976, 7040, 7104,
7168, 7232, 7296, 7360, 7424, 7488, 7552, 7616, 7680, 7744, 7808, 7872, 7936, 8000, 8064, 8128,
8192, 8256, 8320, 8384, 8448, 8512, 8576, 8640, 8704, 8768, 8832, 8896, 8960, 9024, 9088, 9152,
9216, 9280, 9344, 9408, 9472, 9536, 9600, 9664, 9728, 9792, 9856, 9920, 9984, 10048, 10112, 10176,
10240, 10304, 10368, 10432, 10496, 10560, 10624, 10688, 10752, 10816, 10880, 10944, 11008, 11072, 11136, 11200,
11264, 11328, 11392, 11456, 11520, 11584, 11648, 11712, 11776, 11840, 11904, 11968, 12032, 12096, 12160, 12224,
12288, 12352, 12416, 12480, 12544, 12608, 12672, 12736, 12800, 12864, 12928, 12992, 13056, 13120, 13184, 13248,
13312, 13376, 13440, 13504, 13568, 13632, 13696, 13760, 13824, 13888, 13952, 14016, 14080, 14144, 14208, 14272,
14336, 14400, 14464, 14528, 14592, 14656, 14720, 14784, 14848, 14912, 14976, 15040, 15104, 15168, 15232, 15296,
15360, 15424, 15488, 15552, 15616, 15680, 15744, 15808, 15872, 15936, 16000, 16064, 16128, 16192, 16256, 16320
};
static GK_VOID cmos_dgain_calc_table(VI_PIPE ViPipe, GK_U32 *pu32DgainLin, GK_U32 *pu32DgainDb)
{
GK_U32 i;
static GK_U8 dgain_table_size = 255;
CMOS_CHECK_POINTER_VOID(pu32DgainLin);
CMOS_CHECK_POINTER_VOID(pu32DgainDb);
if (*pu32DgainLin >= Dgain_table[dgain_table_size - 1]) {
*pu32DgainLin = Dgain_table[dgain_table_size - 1];
*pu32DgainDb = dgain_table_size - 1;
return;
}
for (i = 1; i < dgain_table_size; i++) {
if (*pu32DgainLin < Dgain_table[i]) {
*pu32DgainLin = Dgain_table[i - 1];
*pu32DgainDb = i - 1;
break;
}
}
return;
}