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RISC-V and VisionFive 2 testing

Open MichaIng opened this issue 3 years ago • 107 comments

Some software titles may not be supported on RISC-V in general, or because no RISC-V binaries or packages are provided yet. Most of these cases have been identified already and related software titles have been disabled for the RISC-V architecture for now.

Other software titles may only be unsupported on the particular VisionFive 2 SBC, or the kernel build we use. This is known for Docker, likely other container engines, the NFS server and the SMB client, but there may be more. We aim to generate own kernel builds, with added features the next week(s). Any help to create an rebase a fork on latest upstream Linux 5.15 is highly appreciated.

Again other software titles may not be supported with latest PHP, Python and other runtime environments and libraries, provided by Debian Sid. The RISC-V architecture is not yet officially supported by Debian, but only with the dedicated Debian ports repository and Debian Sid/unstable suite. Currently, this mostly equals Bookworm, which is the reason DietPi identifies as this. A list of software titles tested on Bookworm can be found here: https://github.com/MichaIng/DietPi/wiki/Debian-Bookworm-testing

As an introduction, read our blog post: https://dietpi.com/blog/?p=2629

MichaIng avatar Mar 04 '23 21:03 MichaIng

Hi, just updated the bootloader and got dietpi running on my VF2, thanks a lot for this! One first major issue is that I only see half the amount of RAM that's available on my board (8 GB model). If I use the starfivetech debian image the full amount shows up, but both armbian and dietpi show half that! Any pointers would be greatly appreciated!

lgray avatar Mar 10 '23 00:03 lgray

Thanks for the info, I read about this on https://forum.rvspace.org. @StephanStS your's is definitely a 4 GiB model, right?

I did already rebase the kernel onto latest upstream 5.15.y, which only required trivial conflict resolving. Will try a build later today. Then will have a look at known fixes for HDMI, e.g. here: https://github.com/hexdump0815/linux-starfive-visionfive2-kernel/tree/main/misc.vf2/patches

MichaIng avatar Mar 10 '23 13:03 MichaIng

Have you updated the SPI bootloader? Some open issues state that it has been fixed since a while:

apt install mtd-utils
curl -fLO 'https://github.com/starfive-tech/VisionFive2/releases/download/VF2_v2.10.4/u-boot-spl.bin.normal.out'
curl -fLO 'https://github.com/starfive-tech/VisionFive2/releases/download/VF2_v2.10.4/visionfive2_fw_payload.img'
flashcp -v u-boot-spl.bin.normal.out /dev/mtd0
flashcp -v visionfive2_fw_payload.img /dev/mtd1
rm u-boot-spl.bin.normal.out visionfive2_fw_payload.img

MichaIng avatar Mar 10 '23 13:03 MichaIng

Yes I updated the bootloader and fw-payload before installing dietpi. What's the best way I can check the versions of uboot / fw-payload just to make sure?

lgray avatar Mar 10 '23 13:03 lgray

Ah okay, indeed not fixed when not using the 4 partitions layout and uEnv.txt to run different boot commands: https://github.com/starfive-tech/VisionFive2/issues/20#issuecomment-1426529552

I'll check where the U-Boot environment is located, so we can adjust it to apply the needed visionfive2_mem_set and also enable eMMC boot (which AFAIK currently does not work).

MichaIng avatar Mar 10 '23 14:03 MichaIng

@MichaIng Ethernet does not work on hardware rev 1.2a, but it works fine on 5.15.0-starfive kernel

congocongo avatar Mar 13 '23 14:03 congocongo

Many thanks for testing and reporting. Did you test both Ethernet ports? It works fine on revision 1.3 here, but not sure whether on both Ethernet ports. @StephanStS could you test switching the port, after

sed -i 's/eth0/eth1/' /etc/network/interfaces

MichaIng avatar Mar 13 '23 15:03 MichaIng

And to compare:

root@DietPi:~# dmesg | grep eth
[    0.645534] starfive-eth-plat 16030000.ethernet: User ID: 0x41, Synopsys ID: 0x52
[    0.645573] starfive-eth-plat 16030000.ethernet:     DWMAC4/5
[    0.645596] starfive-eth-plat 16030000.ethernet: DMA HW capability register supported
[    0.645623] starfive-eth-plat 16030000.ethernet: RX Checksum Offload Engine supported
[    0.645648] starfive-eth-plat 16030000.ethernet: Wake-Up On Lan supported
[    0.645741] starfive-eth-plat 16030000.ethernet: TSO supported
[    0.645764] starfive-eth-plat 16030000.ethernet: Enable RX Mitigation via HW Watchdog Timer
[    0.645793] starfive-eth-plat 16030000.ethernet: Enabled L3L4 Flow TC (entries=1)
[    0.645821] starfive-eth-plat 16030000.ethernet: Enabled RFS Flow TC (entries=8)
[    0.645848] starfive-eth-plat 16030000.ethernet: TSO feature enabled
[    0.645869] starfive-eth-plat 16030000.ethernet: Using 40 bits DMA width
[    0.877423] starfive-eth-plat 16040000.ethernet: User ID: 0x41, Synopsys ID: 0x52
[    0.877461] starfive-eth-plat 16040000.ethernet:     DWMAC4/5
[    0.877483] starfive-eth-plat 16040000.ethernet: DMA HW capability register supported
[    0.877509] starfive-eth-plat 16040000.ethernet: RX Checksum Offload Engine supported
[    0.877535] starfive-eth-plat 16040000.ethernet: Wake-Up On Lan supported
[    0.877620] starfive-eth-plat 16040000.ethernet: TSO supported
[    0.877642] starfive-eth-plat 16040000.ethernet: Enable RX Mitigation via HW Watchdog Timer
[    0.877670] starfive-eth-plat 16040000.ethernet: Enabled L3L4 Flow TC (entries=1)
[    0.877698] starfive-eth-plat 16040000.ethernet: Enabled RFS Flow TC (entries=8)
[    0.877724] starfive-eth-plat 16040000.ethernet: TSO feature enabled
[    0.877745] starfive-eth-plat 16040000.ethernet: Using 40 bits DMA width
[   12.274068] starfive-eth-plat 16030000.ethernet eth0: PHY [stmmac-0:00] driver [YT8531 Gigabit Ethernet] (irq=POLL)
[   12.275607] starfive-eth-plat 16030000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-0
[   12.276592] starfive-eth-plat 16030000.ethernet eth0: No Safety Features support found
[   12.276644] starfive-eth-plat 16030000.ethernet eth0: IEEE 1588-2008 Advanced Timestamp supported
[   12.277839] starfive-eth-plat 16030000.ethernet eth0: configuring for phy/rgmii-id link mode
[   14.364137] starfive-eth-plat 16030000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off
[71598.171890] starfive-eth-plat 16040000.ethernet eth1: PHY [stmmac-1:00] driver [YT8531 Gigabit Ethernet] (irq=POLL)
[71598.172518] starfive-eth-plat 16040000.ethernet eth1: Register MEM_TYPE_PAGE_POOL RxQ-0
[71598.281235] starfive-eth-plat 16040000.ethernet eth1: No Safety Features support found
[71598.281284] starfive-eth-plat 16040000.ethernet eth1: IEEE 1588-2008 Advanced Timestamp supported
[71598.282447] starfive-eth-plat 16040000.ethernet eth1: configuring for phy/rgmii-id link mode

The end is bringing up the second port formally, however, without cable attached and actual data transfer tested yet.

MichaIng avatar Mar 13 '23 15:03 MichaIng

A second eth is YT8512B, not YT8531 on rev 1.2a

Linux DietPi 5.15.98 #1 SMP Fri Mar 10 18:44:22 CET 2023 riscv64 GNU/Linux

[    0.513157] starfive-eth-plat 16030000.ethernet: User ID: 0x41, Synopsys ID: 0x52
[    0.513196] starfive-eth-plat 16030000.ethernet: 	DWMAC4/5
[    0.513219] starfive-eth-plat 16030000.ethernet: DMA HW capability register supported
[    0.513245] starfive-eth-plat 16030000.ethernet: RX Checksum Offload Engine supported
[    0.513271] starfive-eth-plat 16030000.ethernet: Wake-Up On Lan supported
[    0.513363] starfive-eth-plat 16030000.ethernet: TSO supported
[    0.513387] starfive-eth-plat 16030000.ethernet: Enable RX Mitigation via HW Watchdog Timer
[    0.513416] starfive-eth-plat 16030000.ethernet: Enabled L3L4 Flow TC (entries=1)
[    0.513444] starfive-eth-plat 16030000.ethernet: Enabled RFS Flow TC (entries=8)
[    0.513470] starfive-eth-plat 16030000.ethernet: TSO feature enabled
[    0.513492] starfive-eth-plat 16030000.ethernet: Using 40 bits DMA width
[    0.746781] starfive-eth-plat 16040000.ethernet: User ID: 0x41, Synopsys ID: 0x52
[    0.746818] starfive-eth-plat 16040000.ethernet: 	DWMAC4/5
[    0.746840] starfive-eth-plat 16040000.ethernet: DMA HW capability register supported
[    0.746866] starfive-eth-plat 16040000.ethernet: RX Checksum Offload Engine supported
[    0.746891] starfive-eth-plat 16040000.ethernet: Wake-Up On Lan supported
[    0.746975] starfive-eth-plat 16040000.ethernet: TSO supported
[    0.746997] starfive-eth-plat 16040000.ethernet: Enable RX Mitigation via HW Watchdog Timer
[    0.747025] starfive-eth-plat 16040000.ethernet: Enabled L3L4 Flow TC (entries=1)
[    0.747052] starfive-eth-plat 16040000.ethernet: Enabled RFS Flow TC (entries=8)
[    0.747079] starfive-eth-plat 16040000.ethernet: TSO feature enabled
[    0.747100] starfive-eth-plat 16040000.ethernet: Using 40 bits DMA width
[   11.065020] starfive-eth-plat 16030000.ethernet eth0: PHY [stmmac-0:00] driver [YT8531 Gigabit Ethernet] (irq=POLL)
[   11.065868] starfive-eth-plat 16030000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-0
[   11.066855] starfive-eth-plat 16030000.ethernet eth0: No Safety Features support found
[   11.066907] starfive-eth-plat 16030000.ethernet eth0: IEEE 1588-2008 Advanced Timestamp supported
[   11.068055] starfive-eth-plat 16030000.ethernet eth0: configuring for phy/rgmii-id link mode
[   14.364477] starfive-eth-plat 16030000.ethernet eth0: Link is Up - 100Mbps/Full - flow control off
[  233.172002] starfive-eth-plat 16030000.ethernet eth0: Link is Down
[  246.153305] starfive-eth-plat 16030000.ethernet eth0: PHY [stmmac-0:00] driver [YT8531 Gigabit Ethernet] (irq=POLL)
[  246.153580] starfive-eth-plat 16030000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-0
[  246.153882] starfive-eth-plat 16030000.ethernet eth0: No Safety Features support found
[  246.153901] starfive-eth-plat 16030000.ethernet eth0: IEEE 1588-2008 Advanced Timestamp supported
[  246.153917] starfdive-eth-plat 16030000.ethernet eth0: configuring for phy/rgmii-id link mode

root@DietPi:/etc/network# ethtool eth0
Settings for eth0:
	Supported ports: [ TP	 MII ]
	Supported link modes:   10baseT/Half 10baseT/Full
	                        100baseT/Half 100baseT/Full
	                        1000baseT/Half 1000baseT/Full
	Supported pause frame use: Symmetric Receive-only
	Supports auto-negotiation: Yes
	Supported FEC modes: Not reported
	Advertised link modes:  10baseT/Half 10baseT/Full
	                        100baseT/Half 100baseT/Full
	                        1000baseT/Half 1000baseT/Full
	Advertised pause frame use: Symmetric Receive-only
	Advertised auto-negotiation: Yes
	Advertised FEC modes: Not reported
	Link partner advertised link modes:  10baseT/Half 10baseT/Full
	                                     100baseT/Half 100baseT/Full
	                                     1000baseT/Full
	Link partner advertised pause frame use: No
	Link partner advertised auto-negotiation: Yes
	Link partner advertised FEC modes: Not reported
	Speed: 1000Mb/s
	Duplex: Full
	Auto-negotiation: on
	master-slave cfg: preferred slave
	master-slave status: slave
	Port: Twisted Pair
	PHYAD: 0
	Transceiver: internal
	MDI-X: Unknown
	Supports Wake-on: ug
	Wake-on: d
        Current message level: 0x0000003f (63)
                               drv probe link timer ifdown ifup
	Link detected: yes


root@DietPi:/etc/network# ethtool eth1
netlink error: Device or resource busy
netlink error: Device or resource busy
netlink error: Device or resource busy
netlink error: Device or resource busy
netlink error: Device or resource busy
No data available


root@DietPi:~# ip a
1: lo: <LOOPBACK,UP,LOWER_UP> mtu 65536 qdisc noqueue state UNKNOWN group default qlen 1000
    link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00
    inet 127.0.0.1/8 scope host lo
       valid_lft forever preferred_lft forever
2: eth0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP group default qlen 1000
    link/ether 6c:cf:39:00:21:83 brd ff:ff:ff:ff:ff:ff
    inet 192.168.88.60/24 brd 192.168.88.255 scope global eth0
       valid_lft forever preferred_lft forever
3: eth1: <BROADCAST,MULTICAST> mtu 1500 qdisc noop state DOWN group default qlen 1000
    link/ether 6c:cf:39:00:21:84 brd ff:ff:ff:ff:ff:ff


root@DietPi:~# ip r
default via 192.168.88.1 dev eth0 onlink 
192.168.88.0/24 dev eth0 proto kernel scope link src 192.168.88.60 

root@DietPi:~# ping 192.168.88.1
PING 192.168.88.1 (192.168.88.1) 56(84) bytes of data.
From 192.168.88.60 icmp_seq=1 Destination Host Unreachable
From 192.168.88.60 icmp_seq=2 Destination Host Unreachable
From 192.168.88.60 icmp_seq=3 Destination Host Unreachable
^C
--- 192.168.88.1 ping statistics ---
5 packets transmitted, 0 received, +3 errors, 100% packet loss, time 4120ms
pipe 3

congocongo avatar Mar 13 '23 16:03 congocongo

compare it with vendor's build:

Linux starfive 5.15.0-starfive #1 SMP Mon Feb 27 14:03:14 EST 2023 riscv64 GNU/Linux

[    1.278085] starfive-eth-plat 16030000.ethernet: force_sf_dma_mode is ignored if force_thresh_dma_mode is set.
[    1.289466] starfive-eth-plat 16030000.ethernet: User ID: 0x41, Synopsys ID: 0x52
[    1.297753] starfive-eth-plat 16030000.ethernet: 	DWMAC4/5
[    1.303804] starfive-eth-plat 16030000.ethernet: DMA HW capability register supported
[    1.312449] starfive-eth-plat 16030000.ethernet: RX Checksum Offload Engine supported
[    1.321094] starfive-eth-plat 16030000.ethernet: Wake-Up On Lan supported
[    1.328585] starfive-eth-plat 16030000.ethernet: TSO supported
[    1.335016] starfive-eth-plat 16030000.ethernet: Enable RX Mitigation via HW Watchdog Timer
[    1.344241] starfive-eth-plat 16030000.ethernet: Enabled Flow TC (entries=1)
[    1.352023] starfive-eth-plat 16030000.ethernet: TSO feature enabled
[    1.359036] starfive-eth-plat 16030000.ethernet: Using 40 bits DMA width
[    1.647333] starfive-eth-plat 16040000.ethernet: force_sf_dma_mode is ignored if force_thresh_dma_mode is set.
[    1.658771] starfive-eth-plat 16040000.ethernet: User ID: 0x41, Synopsys ID: 0x52
[    1.667055] starfive-eth-plat 16040000.ethernet: 	DWMAC4/5
[    1.673105] starfive-eth-plat 16040000.ethernet: DMA HW capability register supported
[    1.681747] starfive-eth-plat 16040000.ethernet: RX Checksum Offload Engine supported
[    1.690393] starfive-eth-plat 16040000.ethernet: Wake-Up On Lan supported
[    1.697881] starfive-eth-plat 16040000.ethernet: TSO supported
[    1.704313] starfive-eth-plat 16040000.ethernet: Enable RX Mitigation via HW Watchdog Timer
[    1.713547] starfive-eth-plat 16040000.ethernet: Enabled Flow TC (entries=1)
[    1.721327] starfive-eth-plat 16040000.ethernet: TSO feature enabled
[    1.728342] starfive-eth-plat 16040000.ethernet: Using 40 bits DMA width
[    6.890982] starfive-eth-plat 16030000.ethernet end0: renamed from eth0
[    6.946865] starfive-eth-plat 16040000.ethernet end1: renamed from eth1
[   13.887244] starfive-eth-plat 16030000.ethernet end0: PHY [stmmac-0:00] driver [YT8531 Gigabit Ethernet] (irq=POLL)
[   13.898627] starfive-eth-plat 16030000.ethernet end0: Register MEM_TYPE_PAGE_POOL RxQ-0
[   13.912425] starfive-eth-plat 16030000.ethernet end0: No Safety Features support found
[   13.920408] starfive-eth-plat 16030000.ethernet end0: IEEE 1588-2008 Advanced Timestamp supported
[   13.943766] starfive-eth-plat 16030000.ethernet end0: configuring for phy/rgmii-id link mode
[   13.974442] starfive-eth-plat 16040000.ethernet end1: PHY [stmmac-1:00] driver [YT8512B Ethernet] (irq=POLL)
[   13.985089] starfive-eth-plat 16040000.ethernet end1: Register MEM_TYPE_PAGE_POOL RxQ-0
[   13.993446] starfive-eth-plat 16040000.ethernet end1: No Safety Features support found
[   13.993461] starfive-eth-plat 16040000.ethernet end1: IEEE 1588-2008 Advanced Timestamp supported
[   14.034533] starfive-eth-plat 16040000.ethernet end1: configuring for phy/rgmii-id link mode
[   18.088672] starfive-eth-plat 16030000.ethernet end0: Link is Up - 1Gbps/Full - flow control off

root@starfive:~# ethtool end0
Settings for end0:
	Supported ports: [ TP	 MII ]
	Supported link modes:   10baseT/Half 10baseT/Full
	                        100baseT/Half 100baseT/Full
	                        1000baseT/Half 1000baseT/Full
	Supported pause frame use: Symmetric Receive-only
	Supports auto-negotiation: Yes
	Supported FEC modes: Not reported
	Advertised link modes:  10baseT/Half 10baseT/Full
	                        100baseT/Half 100baseT/Full
	                        1000baseT/Half 1000baseT/Full
	Advertised pause frame use: Symmetric Receive-only
	Advertised auto-negotiation: Yes
	Advertised FEC modes: Not reported
	Link partner advertised link modes:  10baseT/Half 10baseT/Full
	                                     100baseT/Half 100baseT/Full
	                                     1000baseT/Full
	Link partner advertised pause frame use: No
	Link partner advertised auto-negotiation: Yes
	Link partner advertised FEC modes: Not reported
	Speed: 1000Mb/s
	Duplex: Full
	Auto-negotiation: on
	master-slave cfg: preferred slave
	master-slave status: slave
	Port: Twisted Pair
	PHYAD: 0
	Transceiver: internal
	MDI-X: Unknown
	Supports Wake-on: ug
	Wake-on: d
        Current message level: 0x0000003f (63)
                               drv probe link timer ifdown ifup
	Link detected: yes


root@starfive:~# ethtool end1
Settings for end1:
	Supported ports: [ TP	 MII ]
	Supported link modes:   10baseT/Half 10baseT/Full
	                        100baseT/Half 100baseT/Full
	Supported pause frame use: Symmetric Receive-only
	Supports auto-negotiation: Yes
	Supported FEC modes: Not reported
	Advertised link modes:  10baseT/Half 10baseT/Full
	                        100baseT/Half 100baseT/Full
	Advertised pause frame use: Symmetric Receive-only
	Advertised auto-negotiation: Yes
	Advertised FEC modes: Not reported
	Speed: 10Mb/s
	Duplex: Half
	Auto-negotiation: on
	Port: Twisted Pair
	PHYAD: 0
	Transceiver: internal
	MDI-X: Unknown
	Supports Wake-on: ug
	Wake-on: d
        Current message level: 0x0000003f (63)
                               drv probe link timer ifdown ifup
	Link detected: no

root@starfive:~# ip a
1: lo: <LOOPBACK,UP,LOWER_UP> mtu 65536 qdisc noqueue state UNKNOWN group default qlen 1000
    link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00
    inet 127.0.0.1/8 scope host lo
       valid_lft forever preferred_lft forever
2: end0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP group default qlen 1000
    link/ether 6c:cf:39:00:21:83 brd ff:ff:ff:ff:ff:ff
    inet 192.168.88.60/24 brd 192.168.88.255 scope global dynamic noprefixroute end0
       valid_lft 540sec preferred_lft 540sec
3: end1: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc mq state DOWN group default qlen 1000
    link/ether 6c:cf:39:00:21:84 brd ff:ff:ff:ff:ff:ff


root@starfive:~# ip r
default via 192.168.88.1 dev end0 proto dhcp src 192.168.88.60 metric 100 
192.168.88.0/24 dev end0 proto kernel scope link src 192.168.88.60 metric 100 

root@starfive:~# ping 192.168.88.1
PING 192.168.88.1 (192.168.88.1) 56(84) bytes of data.
64 bytes from 192.168.88.1: icmp_seq=1 ttl=64 time=0.360 ms
64 bytes from 192.168.88.1: icmp_seq=2 ttl=64 time=0.363 ms
64 bytes from 192.168.88.1: icmp_seq=3 ttl=64 time=0.397 ms
^C
--- 192.168.88.1 ping statistics ---
3 packets transmitted, 3 received, 0% packet loss, time 2052ms
rtt min/avg/max/mdev = 0.360/0.373/0.397/0.016 ms

congocongo avatar Mar 13 '23 16:03 congocongo

And did you test using eth1 on your image?

Yours and our logs match nearly 100%, the only difference is that somehow in your case eth0 is identified as 100Mbps adapter and in our case as well as in your case with vendor kernel as 1Gbps adapter (which is of course correct). I have somehow the impression that there is an issue with dealing our link attributes with the router. Also the link goes down after some minutes, while is is up at first. Just to rule that out, does it help to detach and reattach the cable, then:

ifdown eth0
ifup eth0
sleep 5
ping 192.168.88.1

And another test: Does it help to add stmmaceth=chain_mode:1 to the end of the kernel command-line (append line) in /boot/extlinux/extlinux.conf and reboot to apply the change? I didn't fully understand the purpose of this option and on our test system it didn't make any difference (I also ran benchmarks), so I removed it compared to StarFive's Debian images.

MichaIng avatar Mar 13 '23 16:03 MichaIng

I just copied fresh device tree from vendor's image and now it works. Only first eth is avaliable, looks like there is no driver for YT8512B in kernel. rev 1.2a was supplied with YT8531(1Gb)/YT8512B(100Mb) PHY on board.

congocongo avatar Mar 13 '23 18:03 congocongo

Is this the same with the StarFive image?

Support for this chip was added here: https://github.com/MichaIng/linux/commit/e036d0777cbbc975615105f37b6d6b82257ed62d Then, without removing the support declaration at the top of the file, "inverted" here (whatever this means, since code was only moved around, not really removed, from what I see): https://github.com/MichaIng/linux/commit/3c9ef2d35c69c6f388701bd4b019817d83f3cd99

These commits are from StarFive kernel repository, so should be the same there.

Also the device tree should be identical, at least the raw dts is 🤔.

MichaIng avatar Mar 14 '23 15:03 MichaIng

It works on Starfive. And I copied dtb from this release https://forum.rvspace.org/t/visionfive-2-debian-image-202302-released/2132 from folder 202302

congocongo avatar Mar 15 '23 15:03 congocongo

I've no idea then. The device tree source and the Ethernet driver source are 100% identical and it works well on V1.3. If on your V1.2 neither of both Ethernet adapters work with the device tree from our build, something in mainline Linux 5.15.y must have changed, outside of those drivers and device tree, but affecting them on build time. And this must affect V1.2 only, V1.3 not, even for the Ethernet adapter which uses the same chip. Very strange.

Just to be sure: You copied the jh7110-visionfive-v2.dtb (and only this!) from the latest StarFive Debian image and installed it on our image to /usr/lib/linux-image-visionfive2/starfive/jh7110-visionfive-v2.dtb? Did you run a diff on them to see whether there is an actual difference? Not sure whether builds are reproducible and may contain compiler/environment related differences though.

And also please assure you can reliably trigger the issue by swapping the device trees back and forth and that it is not a coincidence while the issue is unrelated to the device tree, as searching through possibly affecting upstream 5.15.y commits is time consuming as I have no idea where to start 🤔.

MichaIng avatar Mar 15 '23 17:03 MichaIng

I moved a new kernel build in place

Update can be applied via:

cd /tmp
curl -O 'https://dietpi.com/downloads/binaries/linux-image-visionfive2.deb'
dpkg -i linux-image-visionfive2.deb
rm linux-image-visionfive2.deb

Added builtin features

  • Framebuffer device for console on HDMI
  • Fixed DRM for X11/desktop sessions on HDMI
  • IPv6
  • zswap with zstd as default compression
  • binfmt_misc: automatic emulation handler selection, e.g. using Box64 (if installed) when executing x86_64 binaries

Added kernel modules

  • F2FS and Brtfs filesystem types
  • NFS kernel server
  • SMB/CIFS client/mounts
  • tun/OpenVPN
  • WireGuard
  • zram with zstd as default compression

Turned builtins into modules

  • Bluetooth
  • WiFi
  • Plan 9
  • Camera drivers
  • overlayfs
  • exFAT
  • NTFS
  • NFS client/mounts
  • nf_tables packet duplication and FIB lookups
  • Goodix and Tinker FT5406 touchscreens

Removed kernel modules

  • StarFive mailbox

Removed builtin features

  • VirtIO drives, used by virtual machines
  • /dev/pty* legacy pseudo terminal devices
  • /dev/hvc* hypervisor virtual console devices

Other changes

  • Kernel modules are now xz-compressed
  • Default CPU governor is now schedutil (only relevant until dietpi-preboot or cpufrequtils change it in userland)
  • Default hostname is now DietPi (only relevant until the init system changes it in userland)
  • Solved a kernel error at boot, happened as we do not use an initramfs
  • Fixed U-Boot env SPI address in device tree, so fw_printenv now generally can find it at /dev/mtd2

Check out the source code here: https://github.com/MichaIng/linux I'll keep rebasing all changes onto latest upstream Linux 5.15.y release as well merging commits from the StarFive repo.

MichaIng avatar Mar 15 '23 22:03 MichaIng

Will try this kernel. Maybe better to wait when they send patches to upstream? They are actively do it now:

https://lore.kernel.org/lkml/?q=JH71x0

btw I decompiled dtb files:

--- jh7110-visionfive-v2.dtb.dietpi.dts	2023-03-16 16:26:13.199095247 +0300
+++ jh7110-visionfive-v2.dtb.starfive.dts	2023-03-16 16:28:22.569130546 +0300
@@ -347,18 +347,6 @@
 			phandle = <0x2f>;
 		};
 
-		multi-phyctrl@10210000 {
-			compatible = "starfive,phyctrl";
-			reg = <0x00 0x10210000 0x00 0x10000>;
-			phandle = <0x3a>;
-		};
-
-		pcie1-phyctrl@10220000 {
-			compatible = "starfive,phyctrl";
-			reg = <0x00 0x10220000 0x00 0x10000>;
-			phandle = <0x3f>;
-		};
-
 		stg_syscon@10240000 {
 			compatible = "syscon";
 			reg = <0x00 0x10240000 0x00 0x1000>;
@@ -414,7 +402,7 @@
 			#clock-cells = <0x01>;
 			power-domains = <0x1d 0x04>;
 			status = "okay";
-			phandle = <0x47>;
+			phandle = <0x45>;
 		};
 
 		clock-controller@19810000 {
@@ -822,7 +810,7 @@
 			};
 
 			pcie0_perst_default {
-				phandle = <0x3d>;
+				phandle = <0x3c>;
 
 				perst-pins {
 					starfive,pins = <0x1a>;
@@ -834,7 +822,7 @@
 			};
 
 			pcie0_perst_active {
-				phandle = <0x3e>;
+				phandle = <0x3d>;
 
 				perst-pins {
 					starfive,pins = <0x1a>;
@@ -846,7 +834,7 @@
 			};
 
 			pcie0_wake_default {
-				phandle = <0x3b>;
+				phandle = <0x3a>;
 
 				wake-pins {
 					starfive,pins = <0x20>;
@@ -857,7 +845,7 @@
 			};
 
 			pcie0_clkreq_default {
-				phandle = <0x3c>;
+				phandle = <0x3b>;
 
 				clkreq-pins {
 					starfive,pins = <0x1b>;
@@ -868,7 +856,7 @@
 			};
 
 			pcie1_perst_default {
-				phandle = <0x42>;
+				phandle = <0x40>;
 
 				perst-pins {
 					starfive,pins = <0x1c>;
@@ -880,7 +868,7 @@
 			};
 
 			pcie1_perst_active {
-				phandle = <0x43>;
+				phandle = <0x41>;
 
 				perst-pins {
 					starfive,pins = <0x1c>;
@@ -892,7 +880,7 @@
 			};
 
 			pcie1_wake_default {
-				phandle = <0x40>;
+				phandle = <0x3e>;
 
 				wake-pins {
 					starfive,pins = <0x15>;
@@ -903,7 +891,7 @@
 			};
 
 			pcie1_clkreq_default {
-				phandle = <0x41>;
+				phandle = <0x3f>;
 
 				clkreq-pins {
 					starfive,pins = <0x1d>;
@@ -1077,7 +1065,7 @@
 			};
 
 			inno_hdmi-pins {
-				phandle = <0x51>;
+				phandle = <0x4f>;
 
 				inno_hdmi-scl {
 					starfive,pins = <0x00>;
@@ -1133,7 +1121,7 @@
 			#gpio-cells = <0x02>;
 			ngpios = <0x04>;
 			status = "okay";
-			phandle = <0x5a>;
+			phandle = <0x58>;
 		};
 
 		tmon@120e0000 {
@@ -1279,7 +1267,7 @@
 
 					endpoint {
 						remote-endpoint = <0x24>;
-						phandle = <0x4e>;
+						phandle = <0x4c>;
 					};
 				};
 			};
@@ -1299,17 +1287,10 @@
 
 					endpoint {
 						remote-endpoint = <0x26>;
-						phandle = <0x4f>;
+						phandle = <0x4d>;
 					};
 				};
 			};
-
-			touchscreen@14 {
-				compatible = "goodix,gt911";
-				reg = <0x14>;
-				irq-gpios = <0x25 0x1e 0x00>;
-				reset-gpios = <0x25 0x1f 0x00>;
-			};
 		};
 
 		i2c@12030000 {
@@ -1620,10 +1601,10 @@
 			ethernet-phy@0 {
 				rxc_dly_en = <0x01>;
 				tx_delay_sel_fe = <0x05>;
-				tx_delay_sel = <0x0a>;
-				tx_inverted_10 = <0x01>;
-				tx_inverted_100 = <0x01>;
-				tx_inverted_1000 = <0x01>;
+				tx_delay_sel = <0x09>;
+				tx_inverted_10 = <0x00>;
+				tx_inverted_100 = <0x00>;
+				tx_inverted_1000 = <0x00>;
 			};
 		};
 
@@ -1660,10 +1641,10 @@
 
 			ethernet-phy@1 {
 				tx_delay_sel_fe = <0x05>;
-				tx_delay_sel = <0x00>;
+				tx_delay_sel = <0x09>;
 				rxc_dly_en = <0x00>;
-				tx_inverted_10 = <0x01>;
-				tx_inverted_100 = <0x01>;
+				tx_inverted_10 = <0x00>;
+				tx_inverted_100 = <0x00>;
 				tx_inverted_1000 = <0x00>;
 			};
 		};
@@ -1713,8 +1694,8 @@
 			compatible = "starfive,jh7110-tdm";
 			reg = <0x00 0x10090000 0x00 0x1000>;
 			reg-names = "tdm";
-			clocks = <0x1b 0xb8 0x1b 0xb9 0x1b 0xba 0x10 0x1b 0xbb 0x1b 0x11>;
-			clock-names = "clk_tdm_ahb\0clk_tdm_apb\0clk_tdm_internal\0clk_tdm_ext\0clk_tdm\0mclk_inner";
+			clocks = <0x1b 0x09 0x1b 0xb8 0x1b 0x0c 0x1b 0xb9 0x1b 0xba 0x10 0x1b 0xbb 0x1b 0x11>;
+			clock-names = "clk_ahb0\0clk_tdm_ahb\0clk_apb0\0clk_tdm_apb\0clk_tdm_internal\0clk_tdm_ext\0clk_tdm\0mclk_inner";
 			resets = <0x1c 0x69 0x1c 0x6b 0x1c 0x6a>;
 			reset-names = "tdm_ahb\0tdm_apb\0tdm_rst";
 			dmas = <0x32 0x14 0x01 0x32 0x15 0x01>;
@@ -1749,7 +1730,7 @@
 			status = "okay";
 			pinctrl-names = "default";
 			pinctrl-0 = <0x33>;
-			phandle = <0x57>;
+			phandle = <0x55>;
 		};
 
 		i2stx@100c0000 {
@@ -1766,8 +1747,8 @@
 			compatible = "starfive,jh7110-pdm";
 			reg = <0x00 0x100d0000 0x00 0x1000>;
 			reg-names = "pdm";
-			clocks = <0x1b 0xb6 0x1b 0xb7 0x1b 0x12 0x11>;
-			clock-names = "pdm_mclk\0pdm_apb\0clk_mclk\0mclk_ext";
+			clocks = <0x1b 0xb6 0x1b 0x0c 0x1b 0xb7 0x1b 0x12 0x11>;
+			clock-names = "pdm_mclk\0clk_apb0\0pdm_apb\0clk_mclk\0mclk_ext";
 			resets = <0x1c 0x61 0x1c 0x62>;
 			reset-names = "pdm_dmic\0pdm_apb";
 			#sound-dai-cells = <0x00>;
@@ -1776,8 +1757,8 @@
 		i2srx_mst@100e0000 {
 			compatible = "starfive,jh7110-i2srx-master";
 			reg = <0x00 0x100e0000 0x00 0x1000>;
-			clocks = <0x1b 0x0c 0x1b 0xaf 0x1b 0xb0 0x1b 0xb2 0x1b 0xb3 0x1b 0xb5 0x1b 0x12 0x11>;
-			clock-names = "apb0\0i2srx_apb\0i2srx_bclk_mst\0i2srx_lrck_mst\0i2srx_bclk\0i2srx_lrck\0mclk\0mclk_ext";
+			clocks = <0x1b 0x0c 0x1b 0xaf 0x1b 0xb0 0x1b 0xb2 0x1b 0xb3 0x1b 0xb5>;
+			clock-names = "apb0\0i2srx_apb\0i2srx_bclk_mst\0i2srx_lrck_mst\0i2srx_bclk\0i2srx_lrck";
 			resets = <0x1c 0x63 0x1c 0x64>;
 			reset-names = "rst_apb_rx\0rst_bclk_rx";
 			dmas = <0x32 0x18 0x01>;
@@ -1790,8 +1771,8 @@
 		i2srx_3ch@100e0000 {
 			compatible = "starfive,jh7110-i2srx\0snps,designware-i2s";
 			reg = <0x00 0x100e0000 0x00 0x1000>;
-			clocks = <0x1b 0x0c 0x1b 0xaf 0x1b 0x10 0x1b 0x11 0x1b 0xb0 0x1b 0xb2 0x1b 0xb3 0x1b 0xb5 0x1b 0x12 0x11 0x0e 0x0f>;
-			clock-names = "apb0\03ch-apb\0audioroot\0mclk-inner\0bclk_mst\03ch-lrck\0rx-bclk\0rx-lrck\0mclk\0mclk_ext\0bclk-ext\0lrck-ext";
+			clocks = <0x1b 0x0c 0x1b 0xaf 0x1b 0x10 0x1b 0x11 0x1b 0xb0 0x1b 0xb2 0x1b 0xb3 0x1b 0xb5 0x1b 0x12 0x0e 0x0f>;
+			clock-names = "apb0\03ch-apb\0audioroot\0mclk-inner\0bclk_mst\03ch-lrck\0rx-bclk\0rx-lrck\0mclk\0bclk-ext\0lrck-ext";
 			resets = <0x1c 0x63 0x1c 0x64>;
 			dmas = <0x32 0x18 0x01>;
 			dma-names = "rx";
@@ -1815,7 +1796,7 @@
 			status = "okay";
 			pinctrl-names = "default";
 			pinctrl-0 = <0x36>;
-			phandle = <0x54>;
+			phandle = <0x52>;
 		};
 
 		i2stx_4ch1@120c0000 {
@@ -1856,7 +1837,7 @@
 			compatible = "starfive,jh7110-pwmdac-dit";
 			#sound-dai-cells = <0x00>;
 			status = "okay";
-			phandle = <0x58>;
+			phandle = <0x56>;
 		};
 
 		dmic_codec {
@@ -1989,7 +1970,6 @@
 			reg-names = "reg\0config";
 			device_type = "pci";
 			starfive,stg-syscon = <0x1e 0xc0 0xc4 0x130 0x1b8>;
-			starfive,phyctrl = <0x3a 0x28 0x80>;
 			bus-range = <0x00 0xff>;
 			ranges = <0x82000000 0x00 0x30000000 0x00 0x30000000 0x00 0x8000000 0xc3000000 0x09 0x00 0x09 0x00 0x00 0x40000000>;
 			msi-parent = <0x03>;
@@ -2005,9 +1985,9 @@
 			clock-names = "noc\0tl\0axi_mst0\0apb";
 			status = "okay";
 			pinctrl-names = "default\0perst-default\0perst-active";
-			pinctrl-0 = <0x3b 0x3c>;
-			pinctrl-1 = <0x3d>;
-			pinctrl-2 = <0x3e>;
+			pinctrl-0 = <0x3a 0x3b>;
+			pinctrl-1 = <0x3c>;
+			pinctrl-2 = <0x3d>;
 		};
 
 		pcie@2C000000 {
@@ -2019,7 +1999,6 @@
 			reg-names = "reg\0config";
 			device_type = "pci";
 			starfive,stg-syscon = <0x1e 0x270 0x274 0x2e0 0x368>;
-			starfive,phyctrl = <0x3f 0x28 0x80>;
 			bus-range = <0x00 0xff>;
 			ranges = <0x82000000 0x00 0x38000000 0x00 0x38000000 0x00 0x8000000 0xc3000000 0x09 0x80000000 0x09 0x80000000 0x00 0x40000000>;
 			msi-parent = <0x03>;
@@ -2035,9 +2014,9 @@
 			clock-names = "noc\0tl\0axi_mst0\0apb";
 			status = "okay";
 			pinctrl-names = "default\0perst-default\0perst-active";
-			pinctrl-0 = <0x40 0x41>;
-			pinctrl-1 = <0x42>;
-			pinctrl-2 = <0x43>;
+			pinctrl-0 = <0x3e 0x3f>;
+			pinctrl-1 = <0x40>;
+			pinctrl-2 = <0x41>;
 		};
 
 		mailbox@0 {
@@ -2050,26 +2029,26 @@
 			interrupts = <0x1a 0x1b>;
 			#mbox-cells = <0x02>;
 			status = "okay";
-			phandle = <0x44>;
+			phandle = <0x42>;
 		};
 
 		mailbox_client@0 {
 			compatible = "starfive,mailbox-test";
 			mbox-names = "rx\0tx";
-			mboxes = <0x44 0x00 0x01 0x44 0x01 0x00>;
+			mboxes = <0x42 0x00 0x01 0x42 0x01 0x00>;
 			status = "okay";
 		};
 
 		display-subsystem {
 			compatible = "starfive,jh7110-display\0verisilicon,display-subsystem";
-			ports = <0x45>;
+			ports = <0x43>;
 			status = "okay";
 		};
 
 		dssctrl@295B0000 {
 			compatible = "starfive,jh7110-dssctrl\0verisilicon,dss-ctrl\0syscon";
 			reg = <0x00 0x295b0000 0x00 0x90>;
-			phandle = <0x46>;
+			phandle = <0x44>;
 		};
 
 		tda988x_pin {
@@ -2092,8 +2071,8 @@
 
 					endpoint@0 {
 						reg = <0x00>;
-						remote-endpoint = <0x45>;
-						phandle = <0x48>;
+						remote-endpoint = <0x43>;
+						phandle = <0x46>;
 					};
 				};
 			};
@@ -2101,11 +2080,11 @@
 
 		dc8200@29400000 {
 			compatible = "starfive,jh7110-dc8200\0verisilicon,dc8200";
-			verisilicon,dss-syscon = <0x46>;
+			verisilicon,dss-syscon = <0x44>;
 			reg = <0x00 0x29400000 0x00 0x100 0x00 0x29400800 0x00 0x2000 0x00 0x17030000 0x00 0x1000>;
 			interrupts = <0x5f>;
 			status = "okay";
-			clocks = <0x1b 0x3c 0x1b 0x3a 0x1b 0x3e 0x1b 0x3d 0x47 0x07 0x47 0x08 0x47 0x04 0x47 0x05 0x47 0x06 0x1b 0x3e 0x47 0x09 0x18 0x47 0x01 0x47 0x27 0x47 0x28>;
+			clocks = <0x1b 0x3c 0x1b 0x3a 0x1b 0x3e 0x1b 0x3d 0x45 0x07 0x45 0x08 0x45 0x04 0x45 0x05 0x45 0x06 0x1b 0x3e 0x45 0x09 0x18 0x45 0x01 0x45 0x27 0x45 0x28>;
 			clock-names = "noc_disp\0vout_src\0top_vout_axi\0top_vout_ahb\0pix_clk\0vout_pix1\0axi_clk\0core_clk\0vout_ahb\0vout_top_axi\0vout_top_lcd\0hdmitx0_pixelclk\0dc8200_pix0\0dc8200_pix0_out\0dc8200_pix1_out";
 			resets = <0x1c 0x2b 0x1c 0xe0 0x1c 0xe1 0x1c 0xe2 0x1c 0x1a>;
 			reset-names = "rst_vout_src\0rst_axi\0rst_ahb\0rst_core\0rst_noc_disp";
@@ -2116,20 +2095,20 @@
 
 				endpoint@0 {
 					reg = <0x00>;
-					remote-endpoint = <0x48>;
-					phandle = <0x45>;
+					remote-endpoint = <0x46>;
+					phandle = <0x43>;
 				};
 
 				endpoint@1 {
 					reg = <0x01>;
-					remote-endpoint = <0x49>;
-					phandle = <0x52>;
+					remote-endpoint = <0x47>;
+					phandle = <0x50>;
 				};
 
 				endpoint@2 {
 					reg = <0x02>;
-					remote-endpoint = <0x4a>;
-					phandle = <0x4b>;
+					remote-endpoint = <0x48>;
+					phandle = <0x49>;
 				};
 			};
 		};
@@ -2146,8 +2125,8 @@
 					reg = <0x00>;
 
 					endpoint {
-						remote-endpoint = <0x4b>;
-						phandle = <0x4a>;
+						remote-endpoint = <0x49>;
+						phandle = <0x48>;
 					};
 				};
 
@@ -2155,8 +2134,8 @@
 					reg = <0x01>;
 
 					endpoint {
-						remote-endpoint = <0x4c>;
-						phandle = <0x50>;
+						remote-endpoint = <0x4a>;
+						phandle = <0x4e>;
 					};
 				};
 			};
@@ -2165,13 +2144,13 @@
 		mipi-dphy@295e0000 {
 			compatible = "starfive,jh7110-mipi-dphy-tx\0m31,mipi-dphy-tx";
 			reg = <0x00 0x295e0000 0x00 0x10000>;
-			clocks = <0x47 0x0e>;
+			clocks = <0x45 0x0e>;
 			clock-names = "dphy_txesc";
 			resets = <0x1c 0xea 0x1c 0xeb>;
 			reset-names = "dphy_sys\0dphy_txbytehs";
 			#phy-cells = <0x00>;
 			status = "okay";
-			phandle = <0x4d>;
+			phandle = <0x4b>;
 		};
 
 		mipi@295d0000 {
@@ -2179,11 +2158,11 @@
 			reg = <0x00 0x295d0000 0x00 0x10000>;
 			interrupts = <0x62>;
 			reg-names = "dsi";
-			clocks = <0x47 0x0b 0x47 0x0a 0x47 0x0d 0x47 0x0c>;
+			clocks = <0x45 0x0b 0x45 0x0a 0x45 0x0d 0x45 0x0c>;
 			clock-names = "sys\0apb\0txesc\0dpi";
 			resets = <0x1c 0xe3 0x1c 0xe4 0x1c 0xe5 0x1c 0xe6 0x1c 0xe7 0x1c 0xe8>;
 			reset-names = "dsi_dpi\0dsi_apb\0dsi_rxesc\0dsi_sys\0dsi_txbytehs\0dsi_txesc";
-			phys = <0x4d>;
+			phys = <0x4b>;
 			phy-names = "dphy";
 			status = "okay";
 
@@ -2198,13 +2177,13 @@
 
 					endpoint@0 {
 						reg = <0x00>;
-						remote-endpoint = <0x4e>;
+						remote-endpoint = <0x4c>;
 						phandle = <0x24>;
 					};
 
 					endpoint@1 {
 						reg = <0x01>;
-						remote-endpoint = <0x4f>;
+						remote-endpoint = <0x4d>;
 						phandle = <0x26>;
 					};
 				};
@@ -2213,8 +2192,8 @@
 					reg = <0x01>;
 
 					endpoint {
-						remote-endpoint = <0x50>;
-						phandle = <0x4c>;
+						remote-endpoint = <0x4e>;
+						phandle = <0x4a>;
 					};
 				};
 			};
@@ -2225,14 +2204,14 @@
 			reg = <0x00 0x29590000 0x00 0x4000>;
 			interrupts = <0x63>;
 			status = "okay";
-			clocks = <0x47 0x11 0x47 0x0f 0x47 0x10 0x18>;
+			clocks = <0x45 0x11 0x45 0x0f 0x45 0x10 0x18>;
 			clock-names = "sysclk\0mclk\0bclk\0pclk";
 			resets = <0x1c 0xe9>;
 			reset-names = "hdmi_tx";
 			#sound-dai-cells = <0x00>;
 			pinctrl-names = "default";
-			pinctrl-0 = <0x51>;
-			phandle = <0x55>;
+			pinctrl-0 = <0x4f>;
+			phandle = <0x53>;
 
 			port {
 				#address-cells = <0x01>;
@@ -2240,8 +2219,8 @@
 
 				endpoint@0 {
 					reg = <0x00>;
-					remote-endpoint = <0x52>;
-					phandle = <0x49>;
+					remote-endpoint = <0x50>;
+					phandle = <0x47>;
 				};
 			};
 		};
@@ -2262,18 +2241,18 @@
 			simple-audio-card,dai-link@0 {
 				reg = <0x00>;
 				format = "i2s";
-				bitclock-master = <0x53>;
-				frame-master = <0x53>;
+				bitclock-master = <0x51>;
+				frame-master = <0x51>;
 				mclk-fs = <0x100>;
 				status = "okay";
 
 				cpu {
-					sound-dai = <0x54>;
-					phandle = <0x53>;
+					sound-dai = <0x52>;
+					phandle = <0x51>;
 				};
 
 				codec {
-					sound-dai = <0x55>;
+					sound-dai = <0x53>;
 				};
 			};
 		};
@@ -2294,17 +2273,17 @@
 			simple-audio-card,dai-link@0 {
 				reg = <0x00>;
 				format = "left_j";
-				bitclock-master = <0x56>;
-				frame-master = <0x56>;
+				bitclock-master = <0x54>;
+				frame-master = <0x54>;
 				status = "okay";
 
 				cpu {
-					sound-dai = <0x57>;
-					phandle = <0x56>;
+					sound-dai = <0x55>;
+					phandle = <0x54>;
 				};
 
 				codec {
-					sound-dai = <0x58>;
+					sound-dai = <0x56>;
 				};
 			};
 		};
@@ -2343,7 +2322,7 @@
 			firmware-name = "e24_elf";
 			irq-mode = <0x01>;
 			mbox-names = "tx\0rx";
-			mboxes = <0x44 0x00 0x02 0x44 0x02 0x00>;
+			mboxes = <0x42 0x00 0x02 0x42 0x02 0x00>;
 			#address-cells = <0x01>;
 			#size-cells = <0x01>;
 			ranges = <0xc0000000 0x00 0xc0000000 0x200000>;
@@ -2356,7 +2335,7 @@
 		xrp@0 {
 			compatible = "cdns,xrp";
 			reg = <0x00 0x10230000 0x00 0x10000 0x00 0x10240000 0x00 0x10000>;
-			memory-region = <0x59>;
+			memory-region = <0x57>;
 			clocks = <0x1b 0xbe>;
 			clock-names = "core_clk";
 			resets = <0x1c 0x81 0x1c 0x82>;
@@ -2406,7 +2385,7 @@
 
 	memory@40000000 {
 		device_type = "memory";
-		reg = <0x00 0x40000000 0x01 0x00>;
+		reg = <0x00 0x40000000 0x02 0x00>;
 	};
 
 	reserved-memory {
@@ -2430,7 +2409,7 @@
 
 		xrpbuffer@f0000000 {
 			reg = <0x00 0xf0000000 0x00 0x1ffffff 0x00 0xf2000000 0x00 0x1000 0x00 0xf2001000 0x00 0xfff000 0x00 0xf3000000 0x00 0x1000>;
-			phandle = <0x59>;
+			phandle = <0x57>;
 		};
 	};
 
@@ -2438,7 +2417,7 @@
 		compatible = "gpio-leds";
 
 		led-ack {
-			gpios = <0x5a 0x03 0x00>;
+			gpios = <0x58 0x03 0x00>;
 			color = <0x02>;
 			function = "heartbeat";
 			linux,default-trigger = "heartbeat";
@@ -2449,6 +2428,6 @@
 	gpio-restart {
 		compatible = "gpio-restart";
 		gpios = <0x25 0x23 0x00>;
-		priority = <0xa0>;
+		priority = <0xe0>;
 	};
 };

congocongo avatar Mar 16 '23 22:03 congocongo

I tried 5.15.102 from your deb package. Still wrong ethphy settings in dtb file. btw if I'll copy starfive's dtb file it will broke pcie driver, your dtb settings for pcie is correct (on 5.15.102).

congocongo avatar Mar 17 '23 00:03 congocongo

Okay, so all these phandle properties are internal addresses generated at build time, counted up for every added node. Since our device tree has two additional nodes (probably related to https://github.com/MichaIng/linux/commit/85034f1), the addresses are up to 2 larger. You can also see the addresses with <...> on other properties changed the same way as the related phandle property it aims to point to.

Interesting is this part:

@@ -1620,10 +1601,10 @@
 			ethernet-phy@0 {
 				rxc_dly_en = <0x01>;
 				tx_delay_sel_fe = <0x05>;
-				tx_delay_sel = <0x0a>;
-				tx_inverted_10 = <0x01>;
-				tx_inverted_100 = <0x01>;
-				tx_inverted_1000 = <0x01>;
+				tx_delay_sel = <0x09>;
+				tx_inverted_10 = <0x00>;
+				tx_inverted_100 = <0x00>;
+				tx_inverted_1000 = <0x00>;
 			};
 		};
 
@@ -1660,10 +1641,10 @@
 
 			ethernet-phy@1 {
 				tx_delay_sel_fe = <0x05>;
-				tx_delay_sel = <0x00>;
+				tx_delay_sel = <0x09>;
 				rxc_dly_en = <0x00>;
-				tx_inverted_10 = <0x01>;
-				tx_inverted_100 = <0x01>;
+				tx_inverted_10 = <0x00>;
+				tx_inverted_100 = <0x00>;
 				tx_inverted_1000 = <0x00>;
 			};
 		};

Our device tree matches StarFive sources: https://github.com/starfive-tech/linux/blob/JH7110_VisionFive2_devel/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dtsi#L593-L619 These have been changed here: https://github.com/starfive-tech/linux/commit/b516027b3e and here: https://github.com/starfive-tech/linux/commit/4ea57bb614 last November.

I am pretty disturbed by the fact that obviously the StarFive device tree (likely the whole kernel) does not match their kernel sources, respectively is older than the sources from last November. I also found the commit for the additional two nodes now, from last month: https://github.com/starfive-tech/linux/commit/2757ebeaf3

The one commit even states that it is for JH7110B+YT8531PHY while YT8512B obviously requires the old values. So they broke it intentionally. Since their Debian image works on the new revision as well, not sure about the benefit of the new values, and especially not sure why they e.g. did not add a new device tree for A12 (as they exist for A10 and A11), or set those values somehow in the drivers/variable if possible, instead of fixed in the device tree.

Probably the A12 revision was so rare that it wasn't seen important to keep supporting it 🤔.

The issue may be reported here: https://github.com/starfive-tech/linux/issues But lately StarFive is not reacting to issues or pull requests on their repo.

MichaIng avatar Mar 17 '23 15:03 MichaIng

Since I found this valuable information, here the upstream plan and status page: https://rvspace.org/en/project/JH7110_Upstream_Plan

All upstream mails/patches are linked, transparent to follow, including suggested changes by reviewers etc. Very interesting and looks great how upstreaming all relevant parts is driven.

MichaIng avatar Mar 17 '23 23:03 MichaIng

@MichaIng Sorry for the delay in your response. I saw this plan. As I told before, better to wait a pair months when they will finish the most significant parts.

congocongo avatar Mar 21 '23 12:03 congocongo

Wait with what? We have a board and we want to add/polish RISC-V support for DietPi, detect and reports related bugs in Debian etc, so we cannot/do not want to wait for upstream support to have fully finished 😉. For end users who just want a stable system, RISC-V SBCs in general are completely unsuitable, of course, but we are developers 😃.

As of the Ethernet issue: I fear, unless someone reports and pushes the topic, this won't be resolved, since it broke only for an old rarely shipped revision. Any official docs you find are about V1.3. As said, the change looks intentional, not like a mistake, and it is not a bug in the code where Linux maintainers would care about.

The only thing we could do is to create a dedicated device tree, respectively an overlay, which reverts exactly the above parts. We could even enable it automatically at first boot, if the revision can be detected from within the system?

MichaIng avatar Mar 21 '23 12:03 MichaIng

Well, you don’t need a dedicated device tree here. They do modifications using the u-boot scripts before the kernel.

  1. https://github.com/starfive-tech/u-boot/blob/1ae835c25e3d8b7bc3c8981fb720f030c1892d57/board/starfive/visionfive2/starfive_visionfive2.c#L152

  2. https://github.com/starfive-tech/u-boot/blob/1ae835c25e3d8b7bc3c8981fb720f030c1892d57/board/starfive/visionfive2/starfive_visionfive2.c#L403

  3. https://github.com/starfive-tech/u-boot/blob/1539c1fb5a498fd7d20c2cffc84c187d703c8b66/configs/starfive_visionfive2_defconfig#L30

  4. https://github.com/starfive-tech/u-boot/blob/1539c1fb5a498fd7d20c2cffc84c187d703c8b66/include/configs/starfive-visionfive2.h#L99

I guess the root of the problem with Ethernet and correct memory size detection is a hardcoded partitioning schema in the u-boot's scripts. They use 0 and 1 partition for OpenSBI/u-boot images, second partition for EFI/boot and third for root. Something may be wrong with u-boot scripts with one partition.

Disk /dev/mmcblk0: 57.95 GiB, 62226694144 bytes, 121536512 sectors
Units: sectors of 1 * 512 = 512 bytes
Sector size (logical/physical): 512 bytes / 512 bytes
I/O size (minimum/optimal): 512 bytes / 512 bytes
Disklabel type: gpt
Disk identifier: A8D55636-C016-4B30-864A-FE61B85F33D9

Device          Start       End   Sectors  Size Type
/dev/mmcblk0p1   4096      8191      4096    2M HiFive BBL
/dev/mmcblk0p2   8192     16383      8192    4M HiFive FSBL
/dev/mmcblk0p3  16384    221183    204800  100M EFI System
/dev/mmcblk0p4 221184 121534463 121313280 57.8G Linux filesystem

congocongo avatar Mar 21 '23 21:03 congocongo

Ah good to see that. And yes, bootcmd_distro does not run in our case. Looks like its time to do some PRs on their U-Boot script. This hardcoded intended partitioning is very unnecessary. The U-Boot default drive scans work pretty well, as can be seen with the fallback that is done on our image. So it would be perfectly possible to just scan through all drives and partitions for uEnv.txt and extlinux and do those dynamic device tree adjustments in every case. Additionally functional default RAM addresses for a compressed kernel make sense, so this does not need to be set in uEnv.txt, making it obsolete (while it's nice to have the option for environment adjustments), respectively it allows us to use a compressed kernel image.

I fixed a bug which caused a wrong U-Boot environment address: https://github.com/MichaIng/linux/commit/dbd2367 With this we can write an own environment, replacing StarFive's default. I've not yet tested it, but if this works, we can do that on first boot as well to have things fixed. This also allows eMMC usage (as long as the driver in U-Boot is working) which is currently not working either because of the hardcoded device IDs in the env.

MichaIng avatar Mar 21 '23 21:03 MichaIng

Actually, while this U-Boot script commands run with common partitioning, there is also the following which should do the same before even running bootcmd: https://github.com/starfive-tech/u-boot/blob/JH7110_VisionFive2_devel/configs/starfive_visionfive2_defconfig#L31-L32

CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run chipa_set_uboot;run mmcbootenv"

In the environment we see related preboot variable:

  1. preboot=run chipa_set_uboot;run mmcbootenv
  2. chipa_set_uboot=fdt addr ${uboot_fdt_addr};run chipa_set;
  3. chipa_set=if test ${chip_vision} = A; then run chipa_gmac_set;fi;
  4. chipa_gmac_set=fdt set /soc/ethernet@16030000/ethernet-phy@0 tx_inverted_10 <0x0>;fdt set /soc/ethernet@16030000/ethernet-phy@0 tx_inverted_100 <0x0>;fdt set /soc/ethernet@16030000/ethernet-phy@0 tx_inverted_1000 <0x0>;fdt set /soc/ethernet@16030000/ethernet-phy@0 tx_delay_sel <0x9>;fdt set /soc/ethernet@16040000/ethernet-phy@1 tx_inverted_10 <0x0>;fdt set /soc/ethernet@16040000/ethernet-phy@1 tx_inverted_100 <0x0>;fdt set /soc/ethernet@16040000/ethernet-phy@1 tx_inverted_1000 <0x0>;fdt set /soc/ethernet@16040000/ethernet-phy@1 tx_delay_sel <0x9>

However, obviously it does not work in your case, not sure why... Ah wait, this cannot work before the device tree is even loaded, respectively this applies it for U-Boot internal device tree, but not for the one which finally boots. This is the reason they have the device tree loading parts in the env.

Actually

set_fdt_distro=if test ${chip_vision} = A; then if test ${memory_size} = 200000000; then run chipa_gmac_set;run visionfive2_mem_set;fatwrite mmc ${fatbootpart} ${fdt_addr_r} /dtbs/${fdtfile} ${filesize};else run chipa_gmac_set;run visionfive2_mem_set;fatwrite mmc ${fatbootpart} ${fdt_addr_r} /dtbs/${fdtfile} ${filesize};fi;else run visionfive2_mem_set;fatwrite mmc ${fatbootpart} ${fdt_addr_r} /dtbs/${fdtfile} ${filesize};fi;

this rewrites the device tree binary on every boot, which I do not like at all. But reasonably this is the only way to have this parts dynamic as extlinux and common U-Boot scripts (re-)load the device tree and would hence overwrite any previous change. As long as there is no way to add commands to extlinux itself to adjust the device tree after it was loaded, or adjusting these values in userland, I'm going with the overlay route, which seems much cleaner to me than requiring write access and rewriting something essential like the device tree file on every boot. This allows vast cleanup and much simpler and complete (looping through all drives and partitions, regardless which filesystem, checking for efi>extlinux>boot.scr and booting with the first match.

MichaIng avatar Mar 22 '23 15:03 MichaIng

@congocongo Could you show the serial number of your VF2, respectively the first block?

cat /proc/device-tree/serial-number

Mine starts with VF7110B1, which likely means VisionFive JH7110 B1 revision, which matches the chip_vision of the U-Boot env. If it starts with VF7110A in your case, I think we found the needed identifier.

MichaIng avatar Mar 22 '23 22:03 MichaIng

yes.

VF7110A1-2250-D008E000-00000540

congocongo avatar Mar 23 '23 21:03 congocongo

Great!

Could you test this:

apt install device-tree-compiler
cat << '_EOF_' > dietpi-visionfive2-A12.dts
/dts-v1/;
/plugin/;
/ {
        compatible = "starfive,visionfive-v2", "starfive,jh7110";
        fragment@0 {
                target = <&ethernet0>;
                __overlay__ {
                        tx_delay_sel = <0x9>;
                        tx_inverted_10 = <0x0>;
                        tx_inverted_100 = <0x0>;
                        tx_inverted_1000 = <0x0>;
                };
        };
        fragment@1 {
                target = <&ethernet1>;
                __overlay__ {
                        tx_delay_sel = <0x9>;
                        tx_inverted_10 = <0x0>;
                        tx_inverted_100 = <0x0>;
                        tx_inverted_1000 = <0x0>;
                };
        };
};
_EOF_
dtc -I dts -O dtb -o /boot/dietpi-visionfive2-A12.dtbo dietpi-visionfive2-A12.dts
G_CONFIG_INJECT 'fdtoverlays[[:blank:]]' 'fdtoverlays /boot/dietpi-visionfive2-A12.dtbo' /boot/extlinux/extlinux.conf 'fdt[[:blank:]]'

This might not be sufficient, as the U-Boot environment lacks the fdtoverlay_addr_r variable, but let's at least give it a shot. I'll otherwise add fw_setenv + config anyway to allow (and do) adding/setting some variables, also to add support for booting from eMMC, M.2 and USB.

MichaIng avatar Mar 24 '23 14:03 MichaIng

does not work

[FAILED] File does not exist or cannot be written to by current user
Please verify the existence of the file $3
fdt[[:blank:]]
Retry with proper permissions or apply the setting manually:
fdtoverlays /boot/dietpi-visionfive2-A12.dtbo

congocongo avatar Mar 25 '23 17:03 congocongo

Whoops, I forgot the filename in the last command 😄:

G_CONFIG_INJECT 'fdtoverlays[[:blank:]]' 'fdtoverlays /boot/dietpi-visionfive2-A12.dtbo' /boot/extlinux/extlinux.conf 'fdt[[:blank:]]'

MichaIng avatar Mar 25 '23 19:03 MichaIng