ChibiOS
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Fork of ChibiOS for ArduPilot
See https://discuss.ardupilot.org/t/waf-update-waf-submodule-to-ardupilot-waf-master-user-setup-errror
The goal of this PR is to support the case when STM32 MCU is connected through MII/RMII with fixed link parameters. For example, in more complex systems where FMU is...
Bumps [urllib3](https://github.com/urllib3/urllib3) from 1.26.6 to 1.26.18. Release notes Sourced from urllib3's releases. 1.26.18 Made body stripped from HTTP requests changing the request method to GET after HTTP 303 "See Other"...
Bumps [certifi](https://github.com/certifi/python-certifi) from 2021.5.30 to 2023.7.22. Commits 8fb96ed 2023.07.22 afe7722 Bump actions/setup-python from 4.6.1 to 4.7.0 (#230) 2038739 Bump dessant/lock-threads from 3.0.0 to 4.0.1 (#229) 44df761 Hash pin Actions and...
disable interrupts on error when there is no DMA ensure that all byte read conditions are handled in both RxNE and BTF ensure tx path deals with both TxE and...
Hello everyone! I am working on implementing a tool to assess the complexity of CPU architecture porting. It primarily focuses on RISC-V architecture porting. As part of my dataset, I...
This change fixes init for cards supporting High-speed mode, by waiting for the card to exit from busy state after switching the mode before issuing any further commands.
To fix a compile error happen on hardware target with ETH driver, gcc12.2/13.3 with Holybro Pixhawk v6x and CUAV Nano7 this error will only rasie in gcc above 12 ```...
**Problem:** The PX4 bootloader leaves the instruction and data caches in an inconsistent state when jumping to the application. The default __cpu_init() calls SCB_EnableDCache(), which performs invalidate-by-set/way operations. Since the...
Port at commit f274521d9942d7f383a4a45f83ec91f2365709fc from ChibiOS.svn This is a cherry-pick of our changes on top of upstream, hence the conflicts. I have done a PR against ChibiOS.svn so that the...