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Shufflevector semantics

Open nunoplopes opened this issue 4 years ago • 2 comments

Information from @aqjune so it doesn't get lost:

The biggest hurdle in fixing the shufflevector semantics is that the Intel intrinsics that return 'undefined' vectors should be fixed to return 'freeze poison' first. It is because the undefined intrinsics must really return unspecified bits according to the specification: https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_castsi128_si256&expand=628 They cannot return poison because it is too undefined. Or, we can simply fix them to return zero vectors; in this case, we must investigate whether a performance regression happens.

The latest thread was here: https://reviews.llvm.org/D103874 FYI, this is a related LangRef patch that fixes shufflevector with undef masks to yield poison: https://reviews.llvm.org/D93818

nunoplopes avatar Dec 27 '21 19:12 nunoplopes

codegen patch: https://reviews.llvm.org/D130339 (precondition for perf to switch semantics)

nunoplopes avatar Jul 27 '22 18:07 nunoplopes

Update: codegen patch landed. Now need to migrate _mm256_castsi128_si256 to freeze poison. We can then move on with the semantics change.

nunoplopes avatar Sep 01 '22 18:09 nunoplopes

This is done thanks to @ManuelJBrito! 🚀 There still a couple of LLVM optimizations that are broken, but there are specific bug reports for them.

nunoplopes avatar Jul 19 '23 14:07 nunoplopes