CSAL
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ARM-software
Bugs in coresight-tools
1. In cs_topology_dts.py:
Output on [1]:
user@user-desktop:~/Downloads/CSAL/coresight-tools$ sudo python3 cs_topology_dts.py topology.json
/*
* Device Tree source fragment (for guidance only)
*/
/* auto-generated */
funnel@0,72010000 {
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0x72010000 0x1000>;
clocks = <&DBGCLK>;
clock_names = "dbgclk";
Traceback (most recent call last):
File "cs_topology_dts.py", line 330, in <module>
gen_dts(p)
File "cs_topology_dts.py", line 322, in gen_dts
dtw.write()
File "cs_topology_dts.py", line 265, in write
ports = in_ports + out_ports
TypeError: unsupported operand type(s) for +: 'filter' and 'filter'
Same on [2] (funnel has different address).
2. In csscan.py: with option --topology-cti
Output on [1]:
user@user-desktop:~/Downloads/CSAL/coresight-tools$ sudo python3 csscan.py --topology-cti 72000000
@0x72000000 0x1ab 0x211 r2.0 ROM table
@0x72010000 0x23b 0x908 r2.0 CS Funnel funnel <no arch> in-ports:4 locked
@0x72020000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x72030000 0x23b 0x961 r1.0 CS TMC fifo <no arch> TMC:ETF size:16384 memwidth:256 locked integration
@0x72040000 0x23b 0x909 r1.0 CS Replicator replicator <no arch> out-ports:2 locked
@0x72050000 0x23b 0x961 r1.0 CS TMC buffer <no arch> TMC:ETR memwidth:128 wb:32 locked integration
@0x72060000 0x23b 0x912 r4.0 CS TPIU port <no arch> TPIU locked integration
@0x72070000 0x23b 0x962 r1.0 CS STM STM <no arch> - locked
@0x727f0000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x72800000 0x000 0x000 r0.0 ROM table
@0x72810000 0x290 0x505 r0.0 unexpected CIDR: 0x05050505 <unknown part> class:0
@0x72820000 0x23b 0x908 r2.0 CS Funnel funnel <no arch> in-ports:4 locked
@0x72a00000 0x1b0 0x303 r0.0 unexpected CIDR: 0x03030303 <unknown part> class:0
@0x72c00000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x72e00000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x73000000 0x000 0x000 r0.0 ROM table
@0x73010000 0x23b 0x908 r2.0 CS Funnel funnel <no arch> in-ports:4 locked
@0x73400000 0x23b 0x4a2 r2.0 Cortex-A57 ROM ROM table
@0x73410000 0x23b 0xd07 r2.0 Cortex-A57 debug core-debug Arm v8.0-A aff=0x80000000 midr=0x411fd071 pfr=0x2222 dfr=0x10305106 bkpt:6(2) wpt:4 PMUv3 pc-sampling:3 locked
@0x73420000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x73430000 0x23b 0x9d7 r2.0 Cortex-A57 PMU PMU (core) Arm PMUv3.0 aff=0x80000000 counters:0 1-bit not-exportable id: 00000000 00000000 00000000 00000000 locked
@0x73440000 0x23b 0x95e r2.0 Cortex-A57 ETM ETM Arm ETMv4.0 aff=0x80000000 pdsr=0x00000003 ETMv1.0 locked
@0x73510000 0x23b 0xd07 r2.0 Cortex-A57 debug core-debug Arm v8.0-A aff=0x80000001 midr=0x411fd071 pfr=0x2222 dfr=0x10305106 bkpt:6(2) wpt:4 PMUv3 pc-sampling:3 locked
@0x73520000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x73530000 0x23b 0x9d7 r2.0 Cortex-A57 PMU PMU (core) Arm PMUv3.0 aff=0x80000001 counters:6 64-bit prescale exportable id: 7fff0f3f 00000000 00000000 00000000 locked
@0x73540000 0x23b 0x95e r2.0 Cortex-A57 ETM ETM Arm ETMv4.0 aff=0x80000001 pdsr=0x00000023 ETMv4.0 ts:64 bb cc min-ccit:4 retstack events:4 resources:16 addrcomp:4 ssc:1 pecomp:0 counters:2 seqstates:4 extin:110 extinsel:4 locked
@0x73610000 0x23b 0xd07 r2.0 Cortex-A57 debug core-debug Arm v8.0-A aff=0x80000002 locked midr=0x411fd071 pfr=0x2222 dfr=0x10305106 bkpt:6(2) wpt:4 PMUv3 pc-sampling:3 locked
@0x73620000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x73630000 0x23b 0x9d7 r2.0 Cortex-A57 PMU PMU (core) Arm PMUv3.0 aff=0x80000002 counters:0 1-bit not-exportable id: 00000000 00000000 00000000 00000000 locked
@0x73640000 0x23b 0x95e r2.0 Cortex-A57 ETM ETM Arm ETMv4.0 aff=0x80000002 pdsr=0x00000003 ETMv1.0 locked
@0x73710000 0x23b 0xd07 r2.0 Cortex-A57 debug core-debug Arm v8.0-A aff=0x80000003 locked midr=0x411fd071 pfr=0x2222 dfr=0x10305106 bkpt:6(2) wpt:4 PMUv3 pc-sampling:3 locked
@0x73720000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x73730000 0x23b 0x9d7 r2.0 Cortex-A57 PMU PMU (core) Arm PMUv3.0 aff=0x80000003 counters:0 1-bit not-exportable id: 00000000 00000000 00000000 00000000 locked
@0x73740000 0x23b 0x95e r2.0 Cortex-A57 ETM ETM Arm ETMv4.0 aff=0x80000003 pdsr=0x00000003 ETMv1.0 locked
@0x73800000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
CTI topology detection
@0x72020000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x72030000 0x23b 0x961 r1.0 CS TMC fifo <no arch> TMC:ETF size:16384 memwidth:256 locked integration
@0x72050000 0x23b 0x961 r1.0 CS TMC buffer <no arch> TMC:ETR memwidth:128 wb:32 locked integration
@0x72060000 0x23b 0x912 r4.0 CS TPIU port <no arch> TPIU locked integration
@0x73410000 0x23b 0xd07 r2.0 Cortex-A57 debug core-debug Arm v8.0-A aff=0x80000000 midr=0x411fd071 pfr=0x2222 dfr=0x10305106 bkpt:6(2) wpt:4 PMUv3 pc-sampling:3 locked
@0x73420000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x73430000 0x23b 0x9d7 r2.0 Cortex-A57 PMU PMU (core) Arm PMUv3.0 aff=0x80000000 counters:6 64-bit prescale exportable id: 7fff0f3f 00000000 00000000 00000000 locked
@0x73440000 0x23b 0x95e r2.0 Cortex-A57 ETM ETM Arm ETMv4.0 aff=0x80000000 pdsr=0x00000023 ETMv4.0 ts:64 bb cc min-ccit:4 retstack events:4 resources:16 addrcomp:4 ssc:1 pecomp:0 counters:2 seqstates:4 extin:110 extinsel:4 locked
@0x73510000 0x23b 0xd07 r2.0 Cortex-A57 debug core-debug Arm v8.0-A aff=0x80000001 midr=0x411fd071 pfr=0x2222 dfr=0x10305106 bkpt:6(2) wpt:4 PMUv3 pc-sampling:3 locked
@0x73520000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x73530000 0x23b 0x9d7 r2.0 Cortex-A57 PMU PMU (core) Arm PMUv3.0 aff=0x80000001 counters:6 64-bit prescale exportable id: 7fff0f3f 00000000 00000000 00000000 locked
@0x73540000 0x23b 0x95e r2.0 Cortex-A57 ETM ETM Arm ETMv4.0 aff=0x80000001 pdsr=0x00000023 ETMv4.0 ts:64 bb cc min-ccit:4 retstack events:4 resources:16 addrcomp:4 ssc:1 pecomp:0 counters:2 seqstates:4 extin:110 extinsel:4 locked
@0x73610000 0x23b 0xd07 r2.0 Cortex-A57 debug core-debug Arm v8.0-A aff=0x80000002 locked midr=0x411fd071 pfr=0x2222 dfr=0x10305106 bkpt:6(2) wpt:4 PMUv3 pc-sampling:3 locked
@0x73620000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x73630000 0x23b 0x9d7 r2.0 Cortex-A57 PMU PMU (core) Arm PMUv3.0 aff=0x80000002 counters:0 1-bit not-exportable id: 00000000 00000000 00000000 00000000 locked
@0x73640000 0x23b 0x95e r2.0 Cortex-A57 ETM ETM Arm ETMv4.0 aff=0x80000002 pdsr=0x00000003 ETMv1.0 locked
@0x73710000 0x23b 0xd07 r2.0 Cortex-A57 debug core-debug Arm v8.0-A aff=0x80000003 locked midr=0x411fd071 pfr=0x2222 dfr=0x10305106 bkpt:6(2) wpt:4 PMUv3 pc-sampling:3 locked
@0x73720000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x73730000 0x23b 0x9d7 r2.0 Cortex-A57 PMU PMU (core) Arm PMUv3.0 aff=0x80000003 counters:0 1-bit not-exportable id: 00000000 00000000 00000000 00000000 locked
@0x73740000 0x23b 0x95e r2.0 Cortex-A57 ETM ETM Arm ETMv4.0 aff=0x80000003 pdsr=0x00000003 ETMv1.0 locked
CTI outputs:
CTI @0x72020000
TRIGOUT0 -> fifo @0x72030000 TRIGIN
TRIGOUT1 -> fifo @0x72030000 FLUSHIN
TRIGOUT2 -> buffer @0x72050000 TRIGIN
TRIGOUT3 -> buffer @0x72050000 FLUSHIN
TRIGOUT4 -> port @0x72060000 TRIGIN
TRIGOUT5 -> port @0x72060000 FLUSHIN
TRIGOUT6 not connected
TRIGOUT7 not connected
fifo @0x72030000
ACQCOMP -> CTI @0x72020000 TRIGIN1
FULL -> CTI @0x72020000 TRIGIN0
buffer @0x72050000
ACQCOMP -> CTI @0x72020000 TRIGIN3
FULL -> CTI @0x72020000 TRIGIN2
core-debug @0x73410000 (core)
DBGCROSS -> CTI @0x73420000 (core) TRIGIN0
CTI @0x73420000 (core)
TRIGOUT0 -> core-debug @0x73410000 (core) DBGREQ
TRIGOUT1 -> core-debug @0x73410000 (core) DBGRST
Traceback (most recent call last):
File "csscan.py", line 2911, in <module>
scan_rom(c, table_addr, recurse=(not o_top_only), detect_topology=o_detect_topology, detect_topology_cti=o_detect_topology_cti, enable_timestamps=o_enable_timestamps)
File "csscan.py", line 2784, in scan_rom
topology_detection_cti(devices, topo)
File "csscan.py", line 2691, in topology_detection_cti
d.detect()
File "csscan.py", line 2616, in detect
self.detect_master(dm)
File "csscan.py", line 2640, in detect_master
etm = dm.affine_device("ETM")
File "csscan.py", line 700, in affine_device
return self.affinity_group.affine_device(typ)
AttributeError: 'NoneType' object has no attribute 'affine_device'
Error for address 0x73420000, same for 0x73520000, 0x73620000 and 0x73720000. The program runs without errors when excluding these addresses.
Output on [2]:
user@ubuntu:~/Downloads/CSAL/coresight-tools$ sudo python3 csscan.py --topology-cti 24000000
@0x24000000 0x1ab 0x191 r2.0 ROM table
@0x24010000 0x23b 0x908 r3.0 CS Funnel funnel <no arch> in-ports:2 locked
@0x24020000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x24030000 0x23b 0x961 r1.0 CS TMC fifo <no arch> TMC:ETF size:32768 memwidth:256 locked integration
@0x24040000 0x23b 0x909 r2.0 CS Replicator replicator <no arch> out-ports:2 locked
@0x24050000 0x23b 0x961 r1.0 CS TMC buffer <no arch> TMC:ETR memwidth:128 wb:32 locked integration
@0x24060000 0x23b 0x912 r5.0 CS TPIU port <no arch> TPIU locked integration
@0x24070000 0x23b 0x962 r1.0 CS STM STM <no arch> - locked
@0x24080000 0x1b0 0x303 r0.0 unexpected CIDR: 0x03030303 <unknown part> class:0
@0x24800000 0x000 0x000 r0.0 ROM table
@0x24810000 0x290 0x505 r0.0 unexpected CIDR: 0x05050505 <unknown part> class:0
@0x24820000 0x23b 0x908 r3.0 CS Funnel funnel <no arch> in-ports:7 locked
@0x24900000 0x1b0 0x303 r0.0 unexpected CIDR: 0x03030303 <unknown part> class:0
@0x24a00000 0x23b 0x4b5 r0.0 ROM table
@0x24a10000 0x23b 0xc15 r4.0 <unknown part> core-debug <no arch> - locked integration
@0x24a18000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x24a1c000 0x23b 0x931 r0.0 <unknown part> ETM <no arch> pdsr=0x00000001 ETMv3.3 locked integration
@0x24b00000 0x23b 0x4b5 r0.0 ROM table
@0x24b10000 0x23b 0xc15 r4.0 <unknown part> core-debug <no arch> - locked integration
@0x24b18000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x24b1c000 0x23b 0x931 r0.0 <unknown part> ETM <no arch> pdsr=0x00000001 ETMv3.3 locked integration
@0x24c00000 0x23b 0x4b5 r0.0 ROM table
@0x24c10000 0x23b 0xc15 r4.0 <unknown part> core-debug <no arch> - locked integration
@0x24c18000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x24c1c000 0x23b 0x931 r0.0 <unknown part> ETM <no arch> pdsr=0x00000001 ETMv3.3 locked integration
@0x24d00000 0x23b 0x4b5 r0.0 ROM table
@0x24d10000 0x23b 0xc15 r4.0 <unknown part> core-debug <no arch> - locked integration
@0x24d18000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x24d1c000 0x23b 0x931 r0.0 <unknown part> ETM <no arch> pdsr=0x00000001 ETMv3.3 locked integration
@0x24e00000 0x1b0 0x303 r0.0 unexpected CIDR: 0x03030303 <unknown part> class:0
@0x26000000 0x000 0x000 r0.0 ROM table
@0x26020000 0x1ab 0x003 r0.0 <unknown part> class:14
@0x27000000 0x000 0x000 r0.0 ROM table
@0x27010000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27020000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27030000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27110000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27120000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27130000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27410000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27420000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27430000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27510000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27520000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27530000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27810000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27820000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27830000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27910000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27920000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27930000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27c10000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27c20000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27c30000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27d10000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
@0x27d20000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27d30000 0x000 0x000 r0.0 no CIDR <unknown part> class:0
CTI topology detection
@0x24020000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x24030000 0x23b 0x961 r1.0 CS TMC fifo <no arch> TMC:ETF size:32768 memwidth:256 locked integration
@0x24050000 0x23b 0x961 r1.0 CS TMC buffer <no arch> TMC:ETR memwidth:128 wb:32 locked integration
@0x24060000 0x23b 0x912 r5.0 CS TPIU port <no arch> TPIU locked integration
@0x24a10000 0x23b 0xc15 r4.0 <unknown part> core-debug <no arch> - locked integration
@0x24a18000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x24a1c000 0x23b 0x931 r0.0 <unknown part> ETM <no arch> pdsr=0x00000001 ETMv3.3 locked integration
@0x24b10000 0x23b 0xc15 r4.0 <unknown part> core-debug <no arch> - locked integration
@0x24b18000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x24b1c000 0x23b 0x931 r0.0 <unknown part> ETM <no arch> pdsr=0x00000001 ETMv3.3 locked integration
@0x24c10000 0x23b 0xc15 r4.0 <unknown part> core-debug <no arch> - locked integration
@0x24c18000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x24c1c000 0x23b 0x931 r0.0 <unknown part> ETM <no arch> pdsr=0x00000001 ETMv3.3 locked integration
@0x24d10000 0x23b 0xc15 r4.0 <unknown part> core-debug <no arch> - locked integration
@0x24d18000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x24d1c000 0x23b 0x931 r0.0 <unknown part> ETM <no arch> pdsr=0x00000001 ETMv3.3 locked integration
@0x27020000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27120000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27420000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27520000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27820000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27920000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27c20000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
@0x27d20000 0x23b 0x906 r4.0 CS CTI CTI <no arch> channels:4 triggers:8 locked integration
ETM @0x24b1c000 (core) ETMEXTIN2 already asserted
ETM @0x24c1c000 (core) ETMEXTIN2 already asserted
ETM @0x24c1c000 (core) ETMEXTIN3 already asserted
CTI outputs:
CTI @0x24020000
TRIGOUT0 -> fifo @0x24030000 TRIGIN
TRIGOUT0 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple outputs!
TRIGOUT0 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
TRIGOUT0 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
TRIGOUT1 -> fifo @0x24030000 FLUSHIN
TRIGOUT1 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT0
TRIGOUT1 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT0
TRIGOUT1 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT0
TRIGOUT2 -> buffer @0x24050000 TRIGIN
TRIGOUT2 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT1
TRIGOUT2 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT1
TRIGOUT2 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT1
TRIGOUT3 -> buffer @0x24050000 FLUSHIN
TRIGOUT3 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT2
TRIGOUT3 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT2
TRIGOUT3 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT2
TRIGOUT4 -> port @0x24060000 TRIGIN
TRIGOUT4 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT3
TRIGOUT4 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT3
TRIGOUT4 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT3
TRIGOUT5 -> port @0x24060000 FLUSHIN
TRIGOUT5 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT4
TRIGOUT5 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT4
TRIGOUT5 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT4
TRIGOUT6 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple inputs: already connected to CTI @0x24020000 TRIGOUT5
TRIGOUT6 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT5
TRIGOUT6 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT5
TRIGOUT7 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple inputs: already connected to CTI @0x24020000 TRIGOUT6
TRIGOUT7 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT6
TRIGOUT7 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT6
fifo @0x24030000
ACQCOMP -> CTI @0x24020000 TRIGIN1
ACQCOMP -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT7
ACQCOMP -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT7
ACQCOMP -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24020000 TRIGOUT7
FULL -> CTI @0x24020000 TRIGIN0
FULL -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to fifo @0x24030000 ACQCOMP
FULL -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to fifo @0x24030000 ACQCOMP
FULL -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to fifo @0x24030000 ACQCOMP
buffer @0x24050000
ACQCOMP -> CTI @0x24020000 TRIGIN3
ACQCOMP -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to fifo @0x24030000 FULL
ACQCOMP -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to fifo @0x24030000 FULL
ACQCOMP -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to fifo @0x24030000 FULL
FULL -> CTI @0x24020000 TRIGIN2
FULL -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to buffer @0x24050000 ACQCOMP
FULL -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to buffer @0x24050000 ACQCOMP
FULL -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to buffer @0x24050000 ACQCOMP
core-debug @0x24a10000 (core)
DBGCROSS -> None TRIGIN0
CTI @0x24a18000
TRIGOUT0 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple inputs: already connected to buffer @0x24050000 FULL
TRIGOUT0 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to buffer @0x24050000 FULL
TRIGOUT0 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to buffer @0x24050000 FULL
TRIGOUT1 -> ETM @0x24a1c000 (core) ETMEXTIN0
TRIGOUT1 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT0
TRIGOUT1 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT0
TRIGOUT1 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT0
TRIGOUT2 -> ETM @0x24a1c000 (core) ETMEXTIN1
TRIGOUT2 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT1
TRIGOUT2 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT1
TRIGOUT2 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT1
TRIGOUT3 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT2
TRIGOUT3 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT2
TRIGOUT3 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT2
TRIGOUT4 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT3
TRIGOUT4 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT3
TRIGOUT4 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT3
TRIGOUT5 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT4
TRIGOUT5 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT4
TRIGOUT5 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT4
TRIGOUT6 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT5
TRIGOUT6 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT5
TRIGOUT6 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT5
TRIGOUT7 -> ETM @0x24b1c000 (core) ETMEXTIN2
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT6
TRIGOUT7 -> ETM @0x24c1c000 (core) ETMEXTIN2
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT6
TRIGOUT7 -> ETM @0x24c1c000 (core) ETMEXTIN3
multiple outputs!
multiple inputs: already connected to CTI @0x24a18000 TRIGOUT6
ETM @0x24a1c000 (core)
Traceback (most recent call last):
File "csscan.py", line 2911, in <module>
scan_rom(c, table_addr, recurse=(not o_top_only), detect_topology=o_detect_topology, detect_topology_cti=o_detect_topology_cti, enable_timestamps=o_enable_timestamps)
File "csscan.py", line 2784, in scan_rom
topology_detection_cti(devices, topo)
File "csscan.py", line 2691, in topology_detection_cti
d.detect()
File "csscan.py", line 2616, in detect
self.detect_master(dm)
File "csscan.py", line 2650, in detect_master
self.add(dm, "EXTMEXTOUT" + str(i), dm.affine_device("CTI"), "TRIGIN" + str(i+4))
File "csscan.py", line 700, in affine_device
return self.affinity_group.affine_device(typ)
AttributeError: 'NoneType' object has no attribute 'affine_device'
Error for address 0x24a1c000. Same for addresses 0x24b1c000, 0x24c1c000 and 0x24d1c000. Excluding these addresses causes the device to freeze and eventually crash.
3. In cs_topology_sysfs.py:
Output on [1]:
user@user-desktop:~/Downloads/CSAL/coresight-tools$ sudo python3 cs_topology_sysfs.py
Traceback (most recent call last):
File "cs_topology_sysfs.py", line 382, in <module>
p = get_cs_from_sysfs()
File "cs_topology_sysfs.py", line 93, in get_cs_from_sysfs
devtype = devtypes[base]
KeyError: '73540000.ptm'
Output on [2]:
user@ubuntu:~/Downloads/CSAL/coresight-tools$ sudo python3 cs_topology_sysfs.py
Traceback (most recent call last):
File "cs_topology_sysfs.py", line 382, in <module>
p = get_cs_from_sysfs()
File "cs_topology_sysfs.py", line 111, in get_cs_from_sysfs
d.set_mem_address(device_tree_node_address(d.of_node))
File "cs_topology_sysfs.py", line 210, in device_tree_node_address
alen = device_tree_node_address_length(dtn)
File "cs_topology_sysfs.py", line 200, in device_tree_node_address_length
alen = device_tree_node_property_length(dtn, "address")
File "cs_topology_sysfs.py", line 190, in device_tree_node_property_length
assert dtn.startswith("/proc/device-tree/")
AssertionError
Removing the two assert statements in device_tree_node_property_length fixes this.
Devices: [1] Nvidia Jetson Nano with Jetson Linux 32.7.5 (based on Ubuntu 18.04 and kernel v4.9) [2] Nvidia Jetson AGX Xavier with Jetson Linux 35.5.0 (based on Ubuntu 20.04 and kernel v5.10)
Thanks - now fixed #1 (Python 2->3 issue) and hopefully fixed #3 part 1.
The core affinity problem in #2 is going to take more work, to cope with the fact that the CPU CTIs have not set DEVAFF to indicate their affinity.
#3 part 2 is odd - do you have /proc/device-tree on both systems? I'll need to get hold of more device-tree based systems to test this on. We must have thought these asserts were valid at the time of writing. If you pull the latest, I've added a more verbose message to the one that triggers first, it would help if you report back what you see.
Thanks for bringing these to our attention.
Follow-up on cs_topology_dts.py:
No errors on [1], but ports and CTIs are missing.
On [2]:
user@ubuntu:~/Downloads/CSAL/coresight-tools$ sudo python3 cs_topology_dts.py topology.json
/*
* Device Tree source fragment (for guidance only)
*/
/* auto-generated */
funnel@0,24010000 {
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0x24010000 0x1000>;
clocks = <&DBGCLK>;
clock_names = "dbgclk";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
funnel1_in_port0: endpoint {
remote-endpoint = <&funnel3_out_port0>;
};
};
out-ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <0>;
funnel1_out_port0: endpoint {
remote-endpoint = <&etf_in_port0>;
};
};
};
};
etf@0,24030000 {
compatible = "arm,coresight-etf", "arm,primecell";
reg = <0x24030000 0x1000>;
clocks = <&DBGCLK>;
clock_names = "dbgclk";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
etf_in_port0: endpoint {
remote-endpoint = <&funnel1_out_port0>;
};
};
out-ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <0>;
etf_out_port0: endpoint {
remote-endpoint = <&replicator_in_port0>;
};
};
};
};
replicator@0,24040000 {
compatible = "arm,coresight-replicator", "arm,primecell";
reg = <0x24040000 0x1000>;
clocks = <&DBGCLK>;
clock_names = "dbgclk";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
replicator_in_port0: endpoint {
remote-endpoint = <&etf_out_port0>;
};
};
out-ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <0>;
replicator_out_port0: endpoint {
remote-endpoint = <&etb_in_port0>;
};
};
port@2 {
reg = <1>;
replicator_out_port1: endpoint {
remote-endpoint = <&tpiu_in_port0>;
};
};
};
};
etb@0,24050000 {
compatible = "arm,coresight-etb", "arm,primecell";
reg = <0x24050000 0x1000>;
clocks = <&DBGCLK>;
clock_names = "dbgclk";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
etb_in_port0: endpoint {
remote-endpoint = <&replicator_out_port0>;
};
};
};
};
stm@0,24070000 {
compatible = "arm,coresight-stm", "arm,primecell";
reg = <0x24070000 0x1000>, <0xbad0bad 0x1000000>;
reg-names = "stm-base", "stm-stimulus-base";
clocks = <&DBGCLK>;
clock_names = "dbgclk";
out-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
stm_out_port0: endpoint {
remote-endpoint = <&funnel3_in_port>;
};
};
};
};
funnel@0,24820000 {
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0x24820000 0x1000>;
clocks = <&DBGCLK>;
clock_names = "dbgclk";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <2>;
funnel2_in_port2: endpoint {
remote-endpoint = <&etm1_out_port0>;
};
};
port@1 {
reg = <5>;
funnel2_in_port5: endpoint {
remote-endpoint = <&etm4_out_port0>;
};
};
out-ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
reg = <0>;
funnel2_out_port0: endpoint {
remote-endpoint = <&funnel3_in_port>;
};
};
};
};
etm@0,24a1c000 {
compatible = "arm,coresight-etm", "arm,primecell";
reg = <0x24a1c000 0x1000>;
clocks = <&DBGCLK>;
clock_names = "dbgclk";
out-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
etm1_out_port0: endpoint {
remote-endpoint = <&funnel2_in_port2>;
};
};
};
};
etm@0,24b1c000 {
compatible = "arm,coresight-etm", "arm,primecell";
reg = <0x24b1c000 0x1000>;
clocks = <&DBGCLK>;
clock_names = "dbgclk";
};
etm@0,24c1c000 {
compatible = "arm,coresight-etm", "arm,primecell";
reg = <0x24c1c000 0x1000>;
clocks = <&DBGCLK>;
clock_names = "dbgclk";
};
etm@0,24d1c000 {
compatible = "arm,coresight-etm", "arm,primecell";
reg = <0x24d1c000 0x1000>;
clocks = <&DBGCLK>;
clock_names = "dbgclk";
out-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
etm4_out_port0: endpoint {
remote-endpoint = <&funnel2_in_port5>;
};
};
};
};
funnel {
compatible = "arm,coresight-funnel";
%s /* device is not memory-mapped */
clocks = <&DBGCLK>;
clock_names = "dbgclk";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
Traceback (most recent call last):
File "cs_topology_dts.py", line 330, in <module>
gen_dts(p)
File "cs_topology_dts.py", line 322, in gen_dts
dtw.write()
File "cs_topology_dts.py", line 302, in write
print("%s\t\t\treg = <%u>;" % (self.prefix, p.link_port(d)))
TypeError: %u format: a number is required, not NoneType
do you have /proc/device-tree on both systems?
Yes, and I added the CoreSight devices to the DT on both boards.
If you pull the latest, I've added a more verbose message to the one that triggers first, it would help if you report back what you see.
On [1]:
user@user-desktop:~/Downloads/CSAL/coresight-tools$ sudo python3 cs_topology_sysfs.py
Traceback (most recent call last):
File "cs_topology_sysfs.py", line 403, in <module>
p = get_cs_from_sysfs()
File "cs_topology_sysfs.py", line 131, in get_cs_from_sysfs
d.set_mem_address(device_tree_node_address(d.of_node))
File "cs_topology_sysfs.py", line 230, in device_tree_node_address
alen = device_tree_node_address_length(dtn)
File "cs_topology_sysfs.py", line 220, in device_tree_node_address_length
alen = device_tree_node_property_length(dtn, "address")
File "cs_topology_sysfs.py", line 210, in device_tree_node_property_length
assert dtn.startswith("/proc/device-tree/"), "unexpected device tree node: %s" % dtn
AssertionError: unexpected device tree node: /sys/firmware/devicetree/base/etm1@73540000
On [2]:
user@ubuntu:~/Downloads/CSAL/coresight-tools$ sudo python3 cs_topology_sysfs.py
Traceback (most recent call last):
File "cs_topology_sysfs.py", line 403, in <module>
p = get_cs_from_sysfs()
File "cs_topology_sysfs.py", line 131, in get_cs_from_sysfs
d.set_mem_address(device_tree_node_address(d.of_node))
File "cs_topology_sysfs.py", line 230, in device_tree_node_address
alen = device_tree_node_address_length(dtn)
File "cs_topology_sysfs.py", line 220, in device_tree_node_address_length
alen = device_tree_node_property_length(dtn, "address")
File "cs_topology_sysfs.py", line 210, in device_tree_node_property_length
assert dtn.startswith("/proc/device-tree/"), "unexpected device tree node: %s" % dtn
AssertionError: unexpected device tree node: /sys/firmware/devicetree/base/funnel_major@24010000
Did you notice anything strange in the csscan outputs?
The <unknown part>s are expected, but what does <no arch> mean?
I've pushed some improvements to cs_topology_sysfs.py , which should improve discovery from Device Tree.
Right now, it's not discovering CTI connections this way (kernel support for CTI is relatively recent, and for specialised use cases). I will raise that as a separate issue, but can't promise to get round to it any time soon.
cs_topology_sysfs.py works now on [2], but on [1]:
user@user-desktop:~/Downloads/CSAL/coresight-tools$ sudo python3 cs_topology_sysfs.py
Traceback (most recent call last):
File "cs_topology_sysfs.py", line 437, in <module>
p = get_cs_from_sysfs()
File "cs_topology_sysfs.py", line 115, in get_cs_from_sysfs
devtype = devtypes[base]
KeyError: 'etr'
Still the same outputs for cs_topology_dts.py.